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參數(shù)資料
| 型號(hào)： | IRPT2055A |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大小： | 126K |
| 代理商： | IRPT2055A |
page 12
IRPT2051
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS:
Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA:
7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY:
Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY:
Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST:
171 (K&H Bldg.), 3-30-4 Nishi-ikebukuro 3-Chome, Toshima-ku, Tokyo Japan Tel: 81 3 3983 0086
IR SOUTHEAST ASIA:
315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
5/97
Interface With System Controller
All signals are referred to the negative dc bus (N). IN1...IN7
are TTL/CMOS compatible active low signals. Maximum volt-
age rating for these signals is 5V. All channels are provided
with pull-up resistors and can be used with open collector inputs.
FAULT is an open drain, active low signal, provided with a
pull-up and a red LED. Typical current sink capacity for this pin
is 5 mA. This pin should not be directly connected to an npn
transistor base as it would appear to always be in FAULT mode.
V
FB
and I
FB
are the scaled down dc bus voltage and bus cur-
rent respectively. The on-board protection circuitry use these
signals for sensing fault conditions. Any connection to these
signals should be done through a high impedance buffer stag so
as not to disrupt the protection circuits.
Heat Sink Requirements
Figures 5a and 5b (page 6) show the thermal resistance of the
heat sink required for various output power levels and PWM
switching frequencies. Maximum total losses of the unit are also
shown.
This data assumes the following key operating conditions:
The maximum continuous combined losses of the rectifier
and inverter occur at full pulse with modulation. These
losses set the maximum continuous operatiing temperature
of the heat sink.
The maximum combined losses of the rectifier and inverter
at full PWM under overload set the incremental tempera-
ture rise of the heat sink during overload, which is limited
to 10°C due to Z
THSA
.
The minimum output frequency at which full overload cur-
rent is to be delivered sets the peak IGB junction
temperatures.
At low output frequency IGBT junction temperatures tends
to follow the instantaneous fluctuations of the output cur-
rent. Thus, peak junction temperature rise increases as
output frequency decreases.
Voltage Rise During Braking
The motor will feed energy back to the DC link during elec-
tric braking, forcing DC bus voltage to rise above the level
defined by input line voltage. Deceleration of the motor must be
controlled by appropriate PWM control to keep the DC bus volt-
age within the rated maximum vaue. For high inertial loads, or
for very fast deceleration rates, this can be achieved by the brake
provided in the system by connecting an external braking resis-
tor between terminals P and BR. IN7 controls the brake
transistor swtiching.
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