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參數(shù)資料
| 型號(hào)： | IS41C16100S-50KI |
| 英文描述： | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| 中文描述： | 100萬× 16（16兆）動(dòng)態(tài)與江戶頁面模式內(nèi)存 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大小： | 533K |
| 代理商： | IS41C16100S-50KI |
IS41C16100S
IS41LV16100S
6
Integrated Circuit Solution Inc.
DR004-0B
ELECTRICAL CHARACTERISTICS
(1)
(Recommended Operating Conditions unless otherwise noted.)
Symbol Parameter
Test Condition
Speed
Min.
Max.
Unit
I
IL
Input Leakage Current
Any input 0V < V
IN
< Vcc
–5
5
μA
Other inputs not under test = 0V
I
IO
Output Leakage Current
Output is disabled (Hi-Z)
–5
5
μA
0V < V
OUT
< Vcc
V
OH
Output High Voltage Level
I
OH
= –5.0 mA (5V)
2.4
—
V
I
OH
= –2.0 mA (3.3V)
V
OL
Output Low Voltage Level
I
OL
= 4.2 mA (5V)
—
0.4
V
I
OL
= 2.0 mA (3.3V)
I
CC
1
Standby Current: TTL
RAS
,
LCAS
,
UCAS
≥
V
IH
Commerical
5V
—
2
mA
3.3V
—
1
Extended
5V
—
3
mA
3.3V
—
2
I
CC
2
Standby Current: CMOS
RAS
,
LCAS
,
UCAS
≥
V
CC
– 0.2V
5V
—
1
mA
3.3V
—
0.5
I
CC
3
Operating Current:
RAS
,
LCAS
,
UCAS
,
-45
—
190
mA
Random Read/Write
(2,3,4)
Address Cycling, t
RC
= t
RC
(min.)
-50
—
160
Average Power Supply Current
-60
—
145
I
CC
4
Operating Current:
RAS
= V
IL
,
LCAS
,
UCAS
,
-45
—
100
mA
EDO Page Mode
(2,3,4)
Cycling t
PC
= t
PC
(min.)
-50
—
90
Average Power Supply Current
-60
—
80
I
CC
5
Refresh Current:
RAS
-Only
(2,3)
RAS
Cycling,
LCAS
,
UCAS
≥
V
IH
-45
—
180
mA
t
RC
= t
RC
(min.)
-50
—
160
Average Power Supply Current
-60
—
145
I
CC
6
Refresh Current:
RAS
,
LCAS
,
UCAS
Cycling
-45
—
180
mA
CBR
(2,3,5)
t
RC
= t
RC
(min.)
-50
—
160
Average Power Supply Current
-60
—
145
I
CCS
Self Refresh Current
Self Refresh mode
—
—
300
μA
Notes:
1. An initial pause of 200 μs is required after power-up followed by eight
RAS
refresh cycles (
RAS
-Only or CBR) before proper device
operation is assured. The eight
RAS
cycles wake-up should be repeated any time the t
REF
refresh requirement is exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each EDO page cycle.
5. Enables on-chip refresh and address counters.
6. Iccs is sampled only not 100% tested.
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| IS41C16100S-50TI | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41C16100S-60K | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41C16100S-60KI | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS41C16100S-50T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41C16100S-50TI | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41C16100S-60K | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41C16100S-60KI | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41C16100S-60T | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
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