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參數資料
型號: IS41LV16100S-60TI
英文描述: 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
中文描述: 100萬× 16(16兆)動態與江戶頁面模式內存
文件頁數: 3/20頁
文件大小: 533K
代理商: IS41LV16100S-60TI
IS41C16100S
IS41LV16100S
Integrated Circuit Solution Inc.
3
DR004-0B
TRUTH TABLE
Function
RAS
LCAS
UCAS
WE
OE
Address t
R
/t
C
I/O
Standby
H
H
H
X
X
X
High-Z
Read: Word
L
L
L
H
L
ROW/COL
D
OUT
Read: Lower Byte
L
L
H
H
L
ROW/COL
Lower Byte, D
OUT
Upper Byte, High-Z
Read: Upper Byte
L
H
L
H
L
ROW/COL
Lower Byte, High-Z
Upper Byte, D
OUT
Write: Word (Early Write)
L
L
L
L
X
ROW/COL
D
IN
Write: Lower Byte (Early Write)
L
L
H
L
X
ROW/COL
Lower Byte, D
IN
Upper Byte, High-Z
Write: Upper Byte (Early Write)
L
H
L
L
X
ROW/COL
Lower Byte, High-Z
Upper Byte, D
IN
Read-Write
(1,2)
L
L
L
H
L
L
H
ROW/COL
D
OUT
, D
IN
EDO Page-Mode Read
(2)
1st Cycle:
L
H
L
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
L
H
H
L
H
L
H
L
H
L
H
L
ROW/COL
D
OUT
2nd Cycle:
L
H
L
NA/COL
D
OUT
Any Cycle:
L
H
L
NA/NA
D
OUT
EDO Page-Mode Write
(1)
1st Cycle:
L
L
X
ROW/COL
D
IN
2nd Cycle:
L
L
X
NA/COL
D
IN
EDO Page-Mode
(1,2)
1st Cycle:
L
H
L
H
L
L
H
L
H
ROW/COL
D
OUT
, D
IN
Read-Write
2nd Cycle:
Read
(2)
L
H
L
Write
(1,3)
L
H
L
L
NA/COL
D
OUT
, D
IN
Hidden Refresh
L
L
H
L
ROW/COL
D
OUT
L
L
L
X
ROW/COL
D
OUT
RAS
-Only Refresh
L
H
H
X
X
ROW/NA
High-Z
CBR Refresh
(4)
H
L
L
L
X
X
X
High-Z
Notes:
1. These WRITE cycles may also be BYTE WRITE cycles (either
LCAS
or
UCAS
active).
2. These READ cycles may also be BYTE READ cycles (either
LCAS
or
UCAS
active).
3. EARLY WRITE only.
4. At least one of the two
CAS
signals must be active (
LCAS
or
UCAS
).
相關PDF資料
PDF描述
IS41C16100S-50KI 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41C16100S-50T 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41C16100S-50TI 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41C16100S-60K 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41C16100S-60KI 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
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參數描述
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IS41LV16105-50T 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE
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