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參數(shù)資料
型號(hào)： IS41LV16256
英文描述： 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
中文描述： 256K × 16（4兆位）的動(dòng)態(tài)與江戶頁(yè)面模式內(nèi)存
文件頁(yè)數(shù)： 1/20頁(yè)
文件大?。?/td> 215K
代理商： IS41LV16256
IS41C16256
IS41LV16256
Integrated Circuit Solution Inc.
DR001-0E 01/25/2002
1
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. Copyright 2000, Integrated Circuit Solution Inc.
FEATURES
Extended Data-Out (EDO) Page Mode access cycle
TTL compatible inputs and outputs; tristate I/O
Refresh Interval: 512 cycles /8 ms
Refresh Mode:
RAS
-Only,
CAS
-before-
RAS
(CBR),
Hidden
Single power supply:
5V
±
10% (IS41C16256)
3.3V
±
10% (IS41LV16256)
Byte Write and Byte Read operation via two
CAS
Industrial Temperature Range -40
o
C to 85
o
C
DESCRIPTION
The
ICSI
IS41C16256 and IS41LV16256 is a 262,144 x 16-
bit high-performance CMOS Dynamic Random Access Memo-
ries. The IS41C16256 offer an accelerated cycle access
called EDO Page Mode. EDO Page Mode allows 512 random
accesses within a single row with access cycle time as short
as 10 ns per 16-bit word. The Byte Write control, of upper and
lower byte, makes the IS41C16256 ideal for use in
16-, 32-bit wide data bus systems.
These features make the IS41C16256and IS41LV16256 ideally
suited for high-bandwidth graphics, digital signal processing,
high-performance computing systems, and peripheral
applications.
The IS41C16256 is packaged in a 40-pin 400mil SOJ and
400mil TSOP-2.
256K x 16 (4-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
KEY TIMING PARAMETERS
Parameter
Max.
RAS
Access Time (t
RAC
)
Max.
CAS
Access Time (t
CAC
)
Max. Column Address Access Time (t
AA
)
Min. EDO Page Mode Cycle Time (t
PC
)
Min. Read/Write Cycle Time (t
RC
)
-25(5V)
25
10
12
10
45
-35
35
10
18
12
60
-50
50
14
25
20
90
-60
60
15
30
25
110
Unit
ns
ns
ns
ns
ns
40-Pin SOJ
PIN CONFIGURATIONS
40-Pin TSOP-2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VCC
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
PIN DESCRIPTIONS
A0-A8
Address Inputs
I/O0-15
Data Inputs/Outputs
WE
Write Enable
OE
Output Enable
RAS
Row Address Strobe
UCAS
Upper Column Address Strobe
LCAS
Lower Column Address Strobe
Vcc
Power
GND
Ground
NC
No Connection
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VCC
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
相關(guān)PDF資料
PDF描述
IS41LV16256-35K 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16256-35T 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16256-50K 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16256-50T 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16256-60K 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS41LV16256-35K 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16256-35T 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip EDO 4M-Bit 256Kx16 3.3V 40-Pin TSOP-II
IS41LV16256-50K 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16256-50T 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IS41LV16256-60K 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
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