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參數資料
| 型號： | IS41LV44002AS(L) |
| 英文描述： | 4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| 中文描述： | 4米× 4（16兆）動態與江戶頁面模式內存 |
| 文件頁數： | 2/20頁 |
| 文件大?。?/td> | 297K |
| 代理商： | IS41LV44002AS(L) |
2
Integrated Circuit Solution Inc.
DR026-0A 09/04/2001
IC41C44002A/IC41C44002AS(L)
IC41LV44002A/IC41LV44002AS(L)
FEATURES
Extended Data-Out (EDO) Page Mode
access cycle
TTL compatible inputs and outputs
Refresh Interval:
-- 2,048 cycles/32 ms
Refresh Mode:
RAS
-Only,
CAS
-before-
RAS
(CBR), and Hidden
JEDEC standard pinout
Single power supply:
5V ± 10% or 3.3V ± 10%
Self Refresh 2048 cycles for S version
Low power for L version.
DESCRIPTION
The
ICSI
44002 Series is a 4,194,304 x 4-bit high-performance
CMOS Dynamic Random Access Memory. These devices
offer an accelerated cycle access called EDO Page Mode.
EDO Page Mode allows 2,048 random accesses within a single
row with access cycle time as short as 20 ns per 4-bit word.
These features make the 44002 Series ideally suited for high-
bandwidth graphics, digital signal processing, high-performance
computing systems, and peripheral applications.
The 44002 Series is packaged in a 24-pin 300mil SOJ and a 24
pin TSOP-2
4M x 4 (16
-
MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
KEY TIMING PARAMETERS
Parameter
RAS
Access Time (t
RAC
)
CAS
Access Time (t
CAC
)
Column Address Access Time (t
AA
)
EDO Page Mode Cycle Time (t
PC
)
Read/Write Cycle Time (t
RC
)
-
50
50
13
25
20
84
-
60
60
15
30
25
104
Unit
ns
ns
ns
ns
ns
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. Copyright 2000, Integrated Circuit Solution Inc.
PRODUCT SERIES OVERVIEW
Part No.
Refresh
Voltage
IS41C44002A
2K
5V ± 10%
IS41C44002AS(L)
2K
5V ± 10%
IS41LV44002A
2K
3.3V ± 10%
IS41LV44002AS(L)
2K
3.3V ± 10%
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O0
I/O1
WE
RAS
NC
A10
A0
A1
A2
A3
VCC
GND
I/O3
I/O2
CAS
OE
A9
A8
A7
A6
A5
A4
GND
PIN DESCRIPTIONS
A0-A10
Address Inputs (2K Refresh)
I/O0-3
Data Inputs/Outputs
WE
Write Enable
OE
Output Enable
RAS
Row Address Strobe
CAS
Column Address Strobe
Vcc
Power
GND
Ground
NC
No Connection
PIN CONFIGURATION
24 Pin SOJ, TSOP
-
2
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| IS41C44002 | 4Mx4 bit Dynamic RAM with EDO Page Mode |
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| IS41LV44002 | 4Mx4 bit Dynamic RAM with EDO Page Mode |
| IS41LV44004 | 4Mx4 bit Dynamic RAM with EDO Page Mode |
| IS41LV16100S-50T | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IS41LV44002B | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41LV44002B-50J | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41LV44002B-50JI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41LV44002B-50JL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41LV44002B-50JLI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
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