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參數(shù)資料
| 型號： | IS42S16128-12T |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 256K X 16 SYNCHRONOUS DRAM, 12 ns, PDSO50 |
| 封裝： | 0.400 INCH, TSOP2-50 |
| 文件頁數(shù)： | 1/75頁 |
| 文件大小： | 638K |
| 代理商： | IS42S16128-12T |
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IS42S16128
128K Words x 16 Bits x 2 Banks (4-MBIT)
SYNCHRONOUS DYNAMIC RAM
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/13/00
1
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. Copyright 2000, Integrated Silicon Solution, Inc.
FEATURES
Clock frequency: 125 MHz, 100 MHz, 83 MHz
Two banks can be operated simultaneously and
independently
Single 3.3V power supply
LVTTL interface
Programmable burst length
– (1, 2, 4, 8, full page)
Programmable burst sequence:
Sequential/Interleave
Auto refresh, self refresh
1K refresh cycles every 16 ms
Random column address every clock cycle
Programmable
CAS
latency (2, 3 clocks)
Burst read/write and burst read/single write
operations capability
Byte controlled by LDQM and UDQM
Package 400-mil 50-pin TSOP II
DESCRIPTION
ISSI's 4Mb Synchronous DRAM IS42S16128 is organized as
a 131072-word x 16-bit x 2-bank for improved performance.
The synchronous DRAMs achieve high-speed data transfer
using pipeline architecture. All inputs and outputs signals refer
to the rising edge of the clock input.
PIN CONFIGURATIONS
50-Pin TSOP (Type II)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
VCC
I/O0
I/O1
GNDQ
I/O2
I/O3
VCCQ
I/O4
I/O5
GNDQ
I/O6
I/O7
VCCQ
LDQM
WE
CAS
RAS
CS
A9
A8
A0
A1
A2
A3
VCC
GND
I/O15
I/O14
GNDQ
I/O13
I/O12
VCCQ
I/O11
I/O10
GNDQ
I/O9
I/O8
VCCQ
NC
UDQM
CLK
CKE
NC
NC
NC
A7
A6
A5
A4
GND
FEBRUARY 2000
PIN DESCRIPTIONS
A0-A9
Address Input
A0-A8
Row Address Input
A9
Bank Select Address
A0-A7
Column Address Input
I/O0 to I/O15
Data I/O
CLK
System Clock Input
CKE
Clock Enable
CS
Chip Select
RAS
Row Address Strobe Command
CAS
Column Address Strobe Command
WE
Write Enable
LDQM
Lower Bye, Input/Output Mask
UDQM
Upper Bye, Input/Output Mask
Vcc
Power
GND
Ground
VccQ
Power Supply for I/O Pin
GNDQ
Ground for I/O Pin
NC
No Connection
ORDERING INFORMATION
Commercial Range: 0
C to 70
C
Frequency
Speed (ns)
Order Part No.
Package
125 MHz
100 MHz
83 MHz
8
10
12
IS42S16128-8T
IS42S16128-10T
IS42S16128-12T
400-mil TSOP II
400-mil TSOP II
400-mil TSOP II
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS42S16128-8T | Chassis Mount and Din Rail Filters RoHS Compliant: Yes |
| IS42S16160B-7TL | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S16160B-7TLI | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S83200B | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S83200B-6T | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S16128-8T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16160A-6T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S16160A-6TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S16160A-7T | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS42S16160A-7TL | 制造商:Integrated Silicon Solution Inc 功能描述: |
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