- 您現在的位置：買賣IC網 > PDF目錄377551 > IS42S32400B-6BL (INTEGRATED SILICON SOLUTION INC) 4Meg x 32 128-MBIT SYNCHRONOUS DRAM PDF資料下載
參數資料
| 型號： | IS42S32400B-6BL |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| 中文描述： | 4M X 32 SYNCHRONOUS DRAM, 5.4 ns, PBGA90 |
| 封裝： | LEAD FREE, FBGA-90 |
| 文件頁數： | 1/60頁 |
| 文件大?。?/td> | 644K |
| 代理商： | IS42S32400B-6BL |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
IS42S32400B
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION, Rev. 00G
06/15/06
1
Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any
time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are
advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
ISSI
FEATURES
Clock frequency: 166, 143, 125, 100 MHz
Fully synchronous; all signals referenced to a
positive clock edge
Internal bank for hiding row access/precharge
Power supply
V
DD
IS42S32400B
3.3V
LVTTL interface
Programmable burst length
– (1, 2, 4, 8, full page)
Programmable burst sequence:
Sequential/Interleave
Auto Refresh (CBR)
Self Refresh with programmable refresh periods
4096 refresh cycles every 64 ms
Random column address every clock cycle
Programmable
CAS
latency (2, 3 clocks)
Burst read/write and burst read/single write
operations capability
Burst termination by burst stop and precharge
command
Available in Industrial Temperature
Available in 86-pin TSOP-II and 90-ball FBGA
Available in Lead-free
V
DDQ
3.3V
OVERVIEW
ISSI
's 128Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock
input.The 128Mb SDRAM is organized in 1Meg x 32 bit x 4
Banks.
4Meg x 32
128-MBIT SYNCHRONOUS DRAM
PRELIMINARY INFORMATION
JUNE 2006
KEY TIMING PARAMETERS
Parameter
-6
-7
Unit
Clk Cycle Time
CAS
Latency = 3
CAS
Latency = 2
6
8
7
ns
ns
10
Clk Frequency
CAS
Latency = 3
CAS
Latency = 2
166
125
143
100
Mhz
Mhz
Access Time from Clock
CAS
Latency = 3
CAS
Latency = 2
5.4
6.5
5.4
6.5
ns
ns
相關PDF資料 |
PDF描述 |
|---|---|
| IS42S32400B-6T | 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400B-6TI | 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400B-6TL | 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400B-6TLI | 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400B-7B | 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IS42S32400B-6BL-TR | 功能描述:動態隨機存取存儲器 128M (4Mx32) 166MHz Commercial Temp RoHS:否 制造商:ISSI 數據總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS42S32400B-6B-TR | 制造商:Integrated Silicon Solution Inc 功能描述:IC SDRAM 128MBIT 166MHZ 90FBGA |
| IS42S32400B-6T | 制造商:Integrated Silicon Solution Inc 功能描述:IC SDRAM 128MBIT 166MHZ 86TSOP |
| IS42S32400B-6TI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S32400B-6TL | 功能描述:動態隨機存取存儲器 128M (4Mx32) 166MHz Commercial Temp RoHS:否 制造商:ISSI 數據總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
發布緊急采購，3分鐘左右您將得到回復。