- 您現在的位置：買賣IC網 > PDF目錄299228 > IS61LPD51236A-200TQ (INTEGRATED SILICON SOLUTION INC) 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM PDF資料下載
參數資料
| 型號： | IS61LPD51236A-200TQ |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | SRAM |
| 英文描述： | 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM |
| 中文描述： | 512K X 36 CACHE SRAM, 3.1 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數： | 1/29頁 |
| 文件大小： | 552K |
| 代理商： | IS61LPD51236A-200TQ |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
Rev. C
07/08/08
IS61VPD51236a IS61VPD102418a
IS61lPD51236a IS61lPD102418a
Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
FEaTURES
Internalself-timedwritecycle
IndividualByteWriteControlandGlobalWrite
Clockcontrolled,registeredaddress,dataand
control
BurstsequencecontrolusingMODEinput
Threechipenableoptionforsimpledepthex-
pansion and address pipelining
Commondatainputsanddataoutputs
AutoPower-downduringdeselect
Doublecycledeselect
SnoozeMODEforreduced-powerstandby
JTAGBoundaryScanforPBGApackage
PowerSupply
LPD:Vdd 3.3V + 5%, Vddq 3.3V/2.5V + 5%
VPD:Vdd 2.5V + 5%, Vddq 2.5V + 5%
JEDEC100-PinTQFPand165-pinPBGA
package
Lead-freeavailable
DESCRIPTION
The
ISSI IS61LPD/VPD51236A and IS61LPD/VP-
D102418A are high-speed, low-power synchronous
staticRAMs designed to provide burstable, high-performance
memory for communication and networking applications.
TheIS61LPD/VPD51236Aisorganizedas524,288words
by36bits,andtheIS61LPD/VPD102418Aisorganized
as 1,048,576 words by 18 bits. Fabricated with
ISSI's
advanced CMOS technology, the device integrates a
2-bit burst counter, high-speed SRAM core, and high-
drive capability outputs into a single monolithic circuit. All
synchronous inputs pass through registers controlled by
apositive-edge-triggeredsingleclockinput.
Writecyclesareinternallyself-timedandareinitiatedbythe
risingedgeoftheclockinput.Writecyclescanbeoneto
four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
Thebytewriteoperationisperformedbyusingthebytewrite
enable (BWE) input combined with one or more individual
byte write signals (BWx). Inaddition,GlobalWrite(GW)
is available for writing all bytes at one time, regardless of
the byte write controls.
BurstscanbeinitiatedwitheitherADSP (Address Status
Processor)orADSC (Address Status Cache Controller)
input pins. Subsequent burst addresses can be gener-
ated internally and controlled by the ADV (burst address
advance) input pin.
Themodepinisusedtoselecttheburstsequenceorder,
LinearburstisachievedwhenthispinistiedLOW.Inter-
leaveburstisachievedwhenthispinistiedHIGHorleft
floating.
512K x 36, 1024K x 18
18Mb SYNCHRONOUS PIPElINED,
DOUBlE CYClE DESElECT STaTIC RaM
JUlY 2008
FaST aCCESS TIME
Symbol
Parameter
250
200
Units
tkq
ClockAccessTime
2.6
3.1
ns
tkc
CycleTime
4
5
ns
Frequency
250
200
MHz
相關PDF資料 |
PDF描述 |
|---|---|
| IS61LPD51236A-200TQI | 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM |
| IS61LPD51236A-200TQLI | 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM |
| IS61LPD51236A-250B3 | 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM |
| IS61LPD51236A-250B3I | 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM |
| IS61LPD51236A-250TQ | 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IS61LPD51236A-200TQI | 功能描述:靜態隨機存取存儲器 18Mb 512Kx36 200MHz Sync 靜態隨機存取存儲器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61LPD51236A-200TQI-TR | 功能描述:靜態隨機存取存儲器 18Mb 512Kx36 200MHz Sync 靜態隨機存取存儲器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61LPD51236A-200TQLI | 功能描述:靜態隨機存取存儲器 18M (512Kx36) 200MHz Sync 靜態隨機存取存儲器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61LPD51236A-200TQLI-TR | 功能描述:靜態隨機存取存儲器 18M (512Kx36) 200MHz Sync 靜態隨機存取存儲器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61LPD51236A-250B3 | 功能描述:靜態隨機存取存儲器 18Mb,Pipeline,Sync,512K x 36,250MHz,3.3V or 2.5V I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
發布緊急采購，3分鐘左右您將得到回復。