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參數(shù)資料
型號(hào): IS61LV2568-12K
廠商: INTEGRATED SILICON SOLUTION INC
元件分類(lèi): DRAM
英文描述: 256K x 8 HIGH-SPEED CMOS STATIC RAM
中文描述: 256K X 8 STANDARD SRAM, 12 ns, PDSO36
封裝: 0.400 INCH, PLASTIC, SOJ-36
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 88K
代理商: IS61LV2568-12K
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. Copyright 2000, Integrated Silicon Solution, Inc.
IS61LV2568
256K x 8 HIGH-SPEED CMOS STATIC RAM
DECEMBER 2000
ISSI
FEATURES
High-speed access times:
8, 10, 12 and 15 ns
High-performance, low-power CMOS process
Multiple center power and ground pins for
greater noise immunity
Easy memory expansion with
CE
and
OE
options
CE
power-down
Low power: 540 mW @ 10 ns
36 mW standby mode
TTL compatible inputs and outputs
Single 3.3V ±10% power supply
Packages available:
– 36-pin 400-mil SOJ
– 44-pin TSOP (Type II)
DESCRIPTION
The
ISSI
IS61LV2568 is a very high-speed, low power,
262,144-word by 8-bit CMOS static RAM. The IS61LV2568
is fabricated using
ISSI
's high-performance CMOS tech-
nology. This highly reliable process coupled with innova-
tive circuit design techniques, yields higher performance
and low power consumption devices.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 36mW (max.) with CMOS input levels.
The IS61LV2568 operates from a single 3.3V power
supply and all inputs are TTL-compatible.
The IS61LV2568 is available in 36-pin 400-mil SOJ, and
44-pin TSOP (Type II) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A17
CE
OE
WE
256K X 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
12/19/00
1
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