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參數資料
| 型號： | IS61SP12836-3.5B |
| 英文描述： | x36 Fast Synchronous SRAM |
| 中文描述： | x36快速同步SRAM |
| 文件頁數： | 6/16頁 |
| 文件大?。?/td> | 108K |
| 代理商： | IS61SP12836-3.5B |
IS61SF25616
IS61SF25618
ISSI
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
04/17/01
INTERLEAVED BURST ADDRESS TABLE (MODE =
V
CC
or No Connect)
External Address
A1 A0
1st Burst Address
A1 A0
2nd Burst Address
A1 A0
3rd Burst Address
A1 A0
00
01
10
11
01
00
11
10
10
11
00
01
11
10
01
00
LINEAR BURST ADDRESS TABLE
(MODE = GND)
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
T
BIAS
T
STG
P
D
I
OUT
V
IN
, V
OUT
Voltage Relative to GND for I/O Pins
V
IN
Voltage Relative to GND for
for Address and Control Inputs
V
CC
Voltage on Vcc Supply Relatiive to GND
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. This device contains circuitry to protect the inputs against damage due to high static
voltages or electric fields; however, precautions may be taken to avoid application of any
voltage higher than maximum rated voltages to this high-impedance circuit.
3. This device contains circuitry that will ensure the output devices are in High-Z at power up.
Parameter
Temperature Under Bias
Storage Temperature
Power Dissipation
Output Current (per I/O)
Value
–
40 to +85
–
55 to +150
1.6
100
–
0.5 to V
CCQ
+ 0.3
–
0.5 to V
CC
+ 0.5
Unit
°
C
°
C
W
mA
V
V
–
0.5 to 4.6
V
0,0
1,0
0,1
A1', A0' = 1,1
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