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參數資料
| 型號： | IS62WV2568BLL-55BLI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| 中文描述： | 256K X 8 STANDARD SRAM, 55 ns, PBGA36 |
| 封裝： | 6 X 8 MM, LEAD FREE, MINI, BGA-36 |
| 文件頁數： | 1/14頁 |
| 文件大小： | 85K |
| 代理商： | IS62WV2568BLL-55BLI |
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. B
06/20/05
1
IS62WV2568ALL
IS62WV2568BLL
ISSI
Copyright 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
256K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
High-speed access time: 55ns, 70ns
CMOS low power operation
– 36 mW (typical) operating
– 9 μW (typical) CMOS standby
TTL compatible interface levels
Single power supply
– 1.65V--2.2V V
CC
(62WV2568ALL)
– 2.5V--3.6V V
CC
(62WV2568BLL)
Fully static operation: no clock or refresh
required
Three state outputs
Industrial temperature available
Lead-free available
DESCRIPTION
The
ISSI
IS62WV2568ALL / IS62WV2568BLL are high-
speed, 2M bit static RAMs organized as 256K words by 8
bits. It is fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) or when
CS1
is LOW, CS2 is HIGH, the device
assumes a standby mode at which the power dissipation
can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory.
The IS62WV2568ALL and IS62WV2568BLL are packaged
in the JEDEC standard 32-pin TSOP (TYPE I), sTSOP
(TYPE I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
JUNE 2005
A0-A17
CS1
OE
WE
256K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
CS2
相關PDF資料 |
PDF描述 |
|---|---|
| IS62WV2568BLL-55HI | 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| IS62WV2568BLL-55HLI | 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| IS62WV2568BLL-55TI | 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| IS62WV2568BLL-55TLI | 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| IS62WV2568BLL-70B | 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IS62WV2568BLL-55BLI-TR | 功能描述:靜態隨機存取存儲器 2Mb 256Kx8 55ns Async 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS62WV2568BLL-55H | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Async Single 3.3V 2M-Bit 256K x 8 55ns 32-Pin STSOP-I |
| IS62WV2568BLL-55HI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| IS62WV2568BLL-55HLI | 功能描述:靜態隨機存取存儲器 2Mb 256Kx8 55ns Async 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS62WV2568BLL-55HLI-TR | 功能描述:靜態隨機存取存儲器 2Mb 256Kx8 55ns Async 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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