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參數資料
| 型號： | IS93C56-3 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 2,048-Bit Serial EEPROM(2KB串行EEPROM) |
| 中文描述： | 2,048位串行EEPROM（2KB的串行EEPROM中） |
| 文件頁數： | 1/10頁 |
| 文件大小： | 79K |
| 代理商： | IS93C56-3 |
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. Copyright 1997, Integrated Silicon Solution, Inc.
1
IS93C56-3
2,048-BIT SERIAL ELECTRICALLY
ERASABLE PROM
OVERVIEW
The IS93C56-3 is a low cost 2,048-bit, non-volatile, serial
E
2
PROM. It is fabricated using
ISSI’s
advanced CMOS
E
2
PROM technology. The IS93C56-3 provides efficient
non-volatile read/write memory arranged as 128 registers
of 16 bits each. Seven 11-bit instructions control the
operation of the device, which includes read, write, and
mode enable functions. The data out pin (D
OUT
) indicates
the status of the device during in the self-timed non-
volatile programming cycle.
The self-timed write cycle includes an automatic erase-
before-write capability. To protect against inadvertent
writes, the WRITE instruction is accepted only while the
chip is in the write enabled state. Data is written in 16 bits
per write instruction into the selected register. If Chip
Select (CS) is brought HIGH after initiation of the write
cycle, the Data Output (D
OUT
) pin will indicate the READY/
BUSY
status of the chip.
APPLICATIONS
The IS93C56-3 is ideal for high-volume applications re-
quiring low power and low density storage. This device
uses a low cost, space saving 8-pin package. Candidate
applications include robotics, alarm devices, electronic
locks, meters and instrumentation settings.
SEPTEMBER 1999
ISSI
FUNCTIONAL BLOCK DIAGRAM
FEATURES
State-of-the-art architecture
— Non-volatile data storage
— Low voltage operation:
3.0V (Vcc = 2.7V to 6.0V)
— Full TTL compatible inputs and outputs
— Auto increment for efficient data dump
Low voltage read operation
— Down to 2.7V
Hardware and software write protection
— Defaults to write-disabled state at power-up
— Software instructions for write-enable/disable
Advanced low voltage CMOS E
2
PROM
technology
Versatile, easy-to-use Interface
— Self-timed programming cycle
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
— Stop SK anytime for power savings
Durable and reliable
— 10-year data retention after 100K write
cycles
— 100,000 write cycles
— Unlimited read cycles
CS
SK
D
IN
D
OUT
DUMMY
BIT
R/W
AMPS
DATA
REGISTER
(16 BITS)
ADDRESS
REGISTER
1 OF 128
DECODER
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
INSTRUCTION
DECODE,
CONTROL,
AND
CLOCK
GENERATION
INSTRUCTION
REGISTER
(11 BITS)
EEPROM
ARRAY
(128 X 16)
Integrated Silicon Solution, Inc.
EE007-1F
09/03/99
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| IS93C56A-2PI | 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IS93C56-3G | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C56-3GI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C56-3GR | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C56-3GRI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C56-3P | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM |
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