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參數(shù)資料
| 型號(hào)： | IS93C56A-3ZLA3 |
| 廠(chǎng)商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| 中文描述： | 128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.169 INCH, LEAD FREE, MO-153, TSSOP-8 |
| 文件頁(yè)數(shù)： | 1/16頁(yè) |
| 文件大小： | 136K |
| 代理商： | IS93C56A-3ZLA3 |
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Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
05/02/06
1
IS93C56A IS93C66A
ISSI
Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
2K-BIT/4K-BIT SERIAL ELECTRICALLY
ERASABLE PROM
MAY 2006
FUNCTIONAL BLOCK DIAGRAM
CS
SK
D
IN
D
OUT
DUMMY
BIT
R/W
AMPS
DATA
REGISTER
ADDRESS
REGISTER
ADDRESS
DECODER
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
INSTRUCTION
DECODE,
CONTROL,
AND
CLOCK
GENERATION
EEPROM
ARRAY
256/512x8
128/256x16
INSTRUCTION
REGISTER
FEATURES
Industry-standard Microwire Interface
— Non-volatile data storage
— Wide voltage operation:
Vcc = 1.8V to 5.5V
— Auto increment for efficient data dump
User Configured Memory Organization
— By 16-bit or by 8-bit
Hardware and software write protection
— Defaults to write-disabled state at power-up
— Software instructions for write-enable/disable
Enhanced low voltage CMOS E
2
PROM
technology
Versatile, easy-to-use Interface
— Self-timed programming cycle
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
— Chip select enables power savings
Durable and reliable
— 40-year data retention after 1M write cycles
— 1 million write cycles
— Unlimited read cycles
— Schmitt-trigger inputs
Industrial and Automotive Temperature Grade
Lead-free available
DESCRIPTION
The IS93C56A/66A are 2kb/4kb non-volatile,
ISSI
serial EEPROMs. They are fabricated using
an enhanced CMOS design and process. The
IS93C56A/66A contain power-efficient read/write
memory, and organization of either 256/512 bytes
of 8 bits or 128/256 words of 16 bits. When the
ORG pin is connected to Vcc or left unconnected,
x16 is selected; when it is connected to ground,
x8 is selected. The IS93C56A/66A are fully
backward compatible with IS93C56/66.
An instruction set defines the operation of the
devices, including read, write, and mode-enable
functions. To protect against inadvertent data
modification, all erase and write instructions are
accepted only while the devices are write-enabled.
A selected x8 byte or x16 word can be modified
with a single WRITE or ERASE instruction.
Additionally, the two instructions WRITE ALL or
ERASE ALL can program an entire array. Once a
device begins its self-timed program procedure,
the data out pin (Dout) can indicate the READY/
BUSY
status by raising chip select (CS). The self-
timed write cycle includes an automatic erase-
before-write capability. The devices can output
any number of consecutive bytes/words using a
single READ instruction.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS93C66A | 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C66A-2GRI | 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C66A-2GRLI | 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C66A-2PI | 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C66A-2PLI | 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS93C56A-GRA | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:EEPROM |
| IS93C56A-PA | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:EEPROM |
| IS93C66 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述: |
| IS93C66-3 | 制造商:ISSI 制造商全稱(chēng):Integrated Silicon Solution, Inc 功能描述:4,096-BIT SERIAL ELECTRICALLY ERASABLE PROM |
| IS93C66-3G | 制造商:ISSI 制造商全稱(chēng):Integrated Silicon Solution, Inc 功能描述:4,096-BIT SERIAL ELECTRICALLY ERASABLE PROM |
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