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參數(shù)資料
型號(hào): ISL5239KIZ
廠商: INTERSIL CORP
元件分類(lèi): 消費(fèi)家電
英文描述: Pre-Distortion Linearizer
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA196
封裝: 15 X 15 MM, ROHS COMPLIANT, PLASTIC, BGA-196
文件頁(yè)數(shù): 1/31頁(yè)
文件大?。?/td> 653K
代理商: ISL5239KIZ
1
ISL5239
Pre-Distortion Linearizer
The ISL5239 Pre-Distortion Linearizer (PDL) is a full featured
component for Power Amplifier (PA) linearization to improve PA
power efficiency and reduce PA cost.
The Radio Frequency (RF) PA is one of the most expensive and
power-consuming devices in any wireless communication
system. The ideal RF PA would have an entirely linear
relationship between input and output, expressed as a simple
gain which applies at all power levels. Unfortunately, realizable
RF amplifiers are not completely linear and the use of pre-
distortion techniques allows the substitution of lower cost/power
PA’s for higher cost/power PA’s.
The ISL5239 pre-distortion linearizer enables the linearization of
less expensive PA’s to provide more efficient operation closer to
saturation. This provides the benefit of improved linearity and
efficiency, while reducing PA cost and operational expense.
The ISL5239 features a 125MHz pre-distortion bandwidth
capable of full 5th order intermodulation correction for signal
bandwidths up to 20MHz. This bandwidth is particularly well
suited for 3G cellular deployments of UMTS and CDMA2000.
The device also corrects for PA memory effects that limit pre-
distortion performance including self heating.
The ISL5239 combines an input formatter and interpolator, pre-
distortion linearizer, an IF converter, correction filter,
gain/phase/offset adjustment, output formatter, and input and
feedback capture memories into a single chip controlled by a 16-
bit linearizer interface.
The ISL5239 supports log of power, linear magnitude, and linear
power based pre-distortion, utilizing two Look-Up Table (LUT)
based algorithms for the pre-distortion correction. The device
provides programmable scaling and offset correction, and
provides for phase imbalance adjustment.
Features
Output Sample Rates Up to 125MSPS
Full 20MHz Signal Bandwidth
Dynamic Memory Effects Compensation
Input and Feedback Capture Memories
LUT-based Digital Pre-distortion
Two 18-bit Output Busses with Programmable Bit-Width
16-Bit Parallel
μ
Processor Interface
Input Interpolator x2, x4, x8
Programmable Frequency Response Correction
Low Power Architecture
Threshold Comparator for Internal Triggering
Quadrature or Digital IF Architecture
Lowest-Cost Full-Featured Part Available
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Base Station Power Amplifier Linearization
Operates with ISL5217 in Software Radio Solutions
Compatible with the ISL5961 or ISL5929 D/A Converters
Ordering Information
PART
NUMBER
PART
MARKING
TEMP
RANGE
(
o
C)
PACKAGE
PKG. DWG.
#
ISL5239KI
ISL5239KI
-40 to 85 196 Ld BGA V196.15x15
ISL5239KIZ
(Note)
ISL5239KIZ
-40 to 85 196 Ld BGA
(Pb-free)
V196.15x15
ISL5239EVAL1
25
Evaluation Kit
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Data Sheet
September 2, 2005
FN8039.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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