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參數資料
| 型號： | ISP1160BD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Embedded Universal Serial Bus Host Controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數： | 40/88頁 |
| 文件大小： | 2044K |
| 代理商： | ISP1160BD |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 04 — 04 July 2003
40 of 88
9397 750 11371
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Code (Hex): 82 —
write
10.1.4
HcInterruptStatus register (R/W: 03H/83H)
This register provides the status of the events that cause hardware interrupts. When
an event occurs, the HC sets the corresponding bit in this register. When a bit is set, a
hardware interrupt is generated if the interrupt is enabled in the HcInterruptEnable
register (see
Section 10.1.5
) and bit MasterInterruptEnable is set. The HCD can clear
individual bits in this register by writing logic 1 to the bit positions to be cleared, but
cannot set any of these bits. Conversely, the HC can set bits in this register, but
cannot clear these bits.
Table 12:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcCommandStatus register: bit allocation
31
30
29
28
27
26
25
24
reserved
0
R
23
0
R
22
0
R
21
0
R
20
0
R
19
0
R
18
0
R
17
0
R
16
reserved
SOC[1:0]
0
R
15
0
R
14
0
R
13
0
R
12
0
R
11
0
R
10
0
R
9
0
R
8
reserved
0
0
0
0
0
0
0
0
R/W
7
R/W
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
HCR
0
R/W
reserved
0
R/W
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Table 13:
Bit
31 to 18
17 to 16
HcCommandStatus register: bit description
Symbol
Description
-
reserved
SOC[1:0]
SchedulingOverrunCount:
The field is incremented on each
scheduling overrun error. It is initialized to 00B and wraps around
at 11B. It will be incremented when a scheduling overrun is
detected even if SchedulingOverrun in HcInterruptStatus has
already been set. This is used by HCD to monitor any persistent
scheduling problems.
-
reserved
HCR
HostControllerReset:
This bit is set by the HCD to initiate a
software reset of the HC. Regardless of the functional state of the
HC, it moves to the USBSuspend state in which most of the
operational registers are reset, except those stated otherwise, and
no Host bus accesses are allowed. This bit is cleared by the HC
upon the completion of the reset operation. The reset operation
must be completed within 10
μ
s. This bit, when set, does not
cause a reset to the Root Hub and no subsequent reset signaling
should be asserted to its downstream ports.
15 to 1
0
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1160BD,157 | 功能描述:USB 接口集成電路 USB 1.1 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1160BD/01 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
| ISP1160BD/01,118 | 功能描述:USB 接口集成電路 USB HOST CTRL RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1160BD/01,151 | 功能描述:USB 接口集成電路 USB FULL SPEED HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1160BD/01,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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