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參數(shù)資料
| 型號(hào)： | ISP1183 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low-power Universal Serial Bus interface device with DMA |
| 中文描述： | 低功耗通用串行總線與DMA接口設(shè)備 |
| 文件頁數(shù)： | 28/62頁 |
| 文件大小： | 295K |
| 代理商： | ISP1183 |
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Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
28 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Code (hex): 30 to 3F —
read (control OUT, control IN, endpoints 1 to 14)
Transaction —
write or read 1 byte
[1]
[2]
The reset value of the control OUT endpoint is fixed as 0x83 for the Endpoint Configuration register.
The reset value of the control IN endpoint is fixed as 0xC3 for the Endpoint Configuration register.
13.1.2
Address register (R/W: B7H/B6H)
This command sets the USB assigned address in the Address register and enables
the USB device. The Address register bit allocation is shown in
Table 16
.
A USB bus reset sets the device address to 00H (internally) and enables the device.
The value of the Address register (accessible by the microcontroller) is not altered by
the bus reset. In response to the standard USB request (Set Address), the firmware
must issue a Write Device Address command, followed by sending an empty packet
to the host. The
new
device address is activated when the host acknowledges the
empty packet.
Code (hex): B6/B7 —
write or read Address register
Transaction —
write or read 1 byte
Table 14:
Bit
Symbol
Reset
[1][2]
Access
Endpoint Configuration register: bit allocation
7
6
FIFOEN
EPDIR
0
0
R/W
R/W
5
4
3
2
1
0
DBLBUF
0
R/W
FFOISO
0
R/W
FFOSZ[3:0]
0
0
0
0
R/W
R/W
R/W
R/W
Table 15:
Bit
7
Endpoint Configuration register: bit description
Symbol
Description
FIFOEN
Logic 1 indicates an enabled FIFO with allocated memory.
Logic 0 indicates a disabled FIFO (no bytes allocated).
EPDIR
This bit defines the endpoint direction (0 = OUT, 1 = IN). It also
determines the DMA transfer direction (0 = read, 1 = write).
DBLBUF
Logic 1 indicates that this endpoint has double buffering.
FFOISO
Logic 1 indicates an isochronous endpoint. Logic 0 indicates a
bulk or interrupt endpoint.
FFOSZ[3:0]
This field specifies the FIFO size according to
Table 5
.
6
5
4
3 to 0
Table 16:
Bit
Symbol
Reset
Access
Address register: bit allocation
7
DEVEN
0
R/W
6
5
4
3
2
1
0
DEVADR[6:0]
0
R/W
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Table 17:
Bit
7
6 to 0
Address register: bit description
Symbol
Description
DEVEN
Logic 1 enables the device.
DEVADR[6:0]
This field specifies the USB device address.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1183BS | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183BS,118 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,151 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BSFA | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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