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參數(shù)資料
| 型號(hào)： | ISPLSI1032-50LJ |
| 英文描述： | Electrically-Erasable Complex PLD |
| 中文描述： | 電可擦除復(fù)雜可編程邏輯器件 |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 120K |
| 代理商： | ISPLSI1032-50LJ |
Specifications
ispLSI 1048
3
Data Retention
Erase/Reprogram Cycles
COMMERCAL&INDUSTRAL
DESGNS
Absolute Maximum Ratings
1
Supply Voltage V
cc
.................................. -0.5 to +7.0V
Input Voltage Applied........................-2.5 to V
CC
+1.0V
Off-State Output Voltage Applied .....-2.5 to V
CC
+1.0V
Storage Temperature................................ -65 to 150
°
C
Case Temp. with Power Applied .............. -55 to 125
°
C
Max. Junction Temp. (T
J
) with Power Applied ... 150
°
C
1. Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or at any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, follow the programming specifications).
DC Recommended Operating Conditions
Commercial T
A
=
0
°
C to +70
°
Supply Voltage
Industrial
= -40
°
C to +85
°
Input Low Voltage
Input High Voltage
V
V
PARAMETER
SYMBOL
MIN.
MAX.
UNITS
5.25
5.5
0.8
V
cc + 1
V
IL
V
IH
4.75
4.5
0
2.0
V
CC
V
Capacitance (T
A
=25
o
C, f=1.0 MHz)
SYMBOL
C
1
C
2
1
.
Guaranteed but not 100% tested.
PARAMETER
MAXIMUM
1
UNITS
TEST CONDITIONS
Dedicated Input Capacitance
I/O and Clock Capacitance
8
10
pf
pf
V
CC
=5.0V, V
IN
=2.0V
V
CC
=5.0V, V
I/O
, V
Y
=2.0V
Data Retention Specifications
Table 2- 0008B
PARAMETER
MINIMUM
20
10000
MAXIMUM
—
—
UNITS
Years
Cycles
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPLSI1048-50LQ | Electrically-Erasable Complex PLD |
| ISPLSI1048-50LQI | Electrically-Erasable Complex PLD |
| ISPLSI2064A-80LJ84I | |
| ISPLSI2064A-80LT100 | Electrically-Erasable Complex PLD |
| ISPLSI2064A-80LT100I | Electrically-Erasable Complex PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPLSI1032-60 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ISPLSI1032-60LG | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ISPLSI1032-60LG/833 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ISPLSI1032-60LG/883 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| ISPLSI1032-60LGI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
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