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參數資料
| 型號： | JTSX8388B-1V1B |
| 英文描述： | A/D CONVERTER |
| 中文描述： | 的A / D轉換器 |
| 文件頁數： | 1/45頁 |
| 文件大小： | 1597K |
| 代理商： | JTSX8388B-1V1B |
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Product Specification
MAIN FEATURES
8-bit resolution.
ADC gain adjust.
2 GHz full power input bandwidth.
1 Gsps (min) sampling rate.
SINAD = 45 dB (7.4 Effective Bits) SFDR = 58 dBc
@ F
S
= 1 Gsps, F
IN
= 20 MHz :
SINAD = 44 dB (7.2 Effective Bits) SFDR = 56 dBc
@ F
S
= 1 Gsps, F
IN
= 500 MHz :
SINAD = 42 dB (7.0 Effective Bits) SFDR = 52 dBc
@ F
S
= 1 Gsps, F
IN
= 1000 MHz (-3 dB FS)
2-tone IMD : -52dBc (489 MHz, 490 MHz) @ 1GSPS.
DNL = 0.3 LSB
INL = 0.7 LSB.
Low Bit Error Rate (10
) @ 1 Gsps
Very low input capacitance : 0.4 pF
500 mVpp differential or single-ended analog inputs.
Differential or single-ended 50
ECL compatible clock inputs.
ECL or LVDS/HSTL output compatibility.
Data ready output with asynchronous reset.
Gray or Binary selectable output data ; NRZ output mode.
Power consumption :
3.4W @ Tj = 90°C
Dual power supply : ± 5 V
Radiation tolerance oriented design (150 Krad (Si) measured).
APPLICATIONS
Digital Sampling Oscilloscopes.
Satellite receiver.
Electronic countermeasures / Electronic warfare.
Direct RF down – conversion.
SCREENING
Atmel-Grenoble standard die flow.
Temperature range : 0°C < Ta ; Tj < +90°C
DESCRIPTION
The JTS8388B is a monolithic 8–bit analog–to–digital converter, designed for
digitizing wide bandwidth analog signals at very high sampling rates of up to 1
Gsps.
The JTS8388B is using an innovative architecture, including an on chip Sample
and Hold (S/H), and is fabricated with an advanced high speed bipolar process.
The on–chip S/H has a 2 GHz full power input bandwidth, providing excellent
dynamic performance in undersampling applications (High IF digitizing).
ADC 8-bit 1 Gsps
JTS8388B
1/ Delivered in die form
2/ Chip Evaluation Board : Available
TSEV8388B
3/ CQFP68 packaged device available :
refer to TS8388BF datasheet
4/ CBGA72 packaged device available:
refer to TS8388BG data sheet
January 2002
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