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參數資料
| 型號： | K4E640412D |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 16M x 4bit CMOS Dynamic RAM with Extended Data Out |
| 中文描述： | 16米x 4位的CMOS動態隨機存儲器的擴展數據輸出 |
| 文件頁數： | 1/21頁 |
| 文件大小： | 415K |
| 代理商： | K4E640412D |
CMOS DRAM
K4E660412D,K4E640412D
This is a family of 16,777,216 x 4 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-
mal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden
refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 16Mx4 EDO Mode DRAM family is fabricated
using Samsung
′
s advanced CMOS process to realize high band-width, low power consumption and high reliability.
Extended Data Out Mode operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
Fast parallel test mode capability
LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in Plastic SOJ and TSOP(II) packages
+3.3V
±
0.3V power supply
Control
Clocks
RAS
CAS
W
Vcc
Vss
A0~A12
(A0~A11)*1
A0~A10
(A0~A11)*1
Memory Array
16,777,216 x 4
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
16M x 4bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
Note) *1 : 4K Refresh
Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal
L-ver
K4E660412D*
K4E640412D
8K
4K
64ms
128ms
Unit : mW
S
DQ0
to
DQ3
Data out
Buffer
Data in
Buffer
*
Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
Active Power Dissipation
Speed
-45
-50
-60
8K
324
288
252
4K
432
396
360
Performance Range
Speed
-45
-50
-60
t
RAC
45ns
50ns
60ns
t
CAC
12ns
13ns
15ns
t
RC
74ns
84ns
104ns
t
HPC
17ns
20ns
25ns
Row Decoder
Column Decoder
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Part Identification
- K4E660412D-JC/L(3.3V, 8K Ref., SOJ)
- K4E640412D-JC/L(3.3V, 4K Ref., SOJ)
- K4E660412D-TC/L(3.3V, 8K Ref., TSOP)
- K4E640412D-TC/L(3.3V, 4K Ref., TSOP)
FEATURES
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| K4E660812C | 8M x 8bit CMOS Dynamic RAM with Extended Data Out |
| K4E640812C | 8M x 8bit CMOS Dynamic RAM with Extended Data Out |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| K4E640412D-TC50 | 制造商:Samsung Semiconductor 功能描述:DRAM Chip EDO 64M-Bit 16Mx4 3.3V 32-Pin TSOP-II |
| K4E640412D-TL50 | 制造商:Samsung Semiconductor 功能描述:DRAM Chip EDO 64M-Bit 16Mx4 3.3V 32-Pin TSOP-II |
| K4E640412E | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 4bit CMOS Dynamic RAM with Extended Data Out |
| K4E640412E-JI45 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 4bit CMOS Dynamic RAM with Extended Data Out |
| K4E640412E-JI50 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 4bit CMOS Dynamic RAM with Extended Data Out |
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