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參數資料
| 型號： | K7Q161854A-FC10 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36-bit, 1Mx18-bit QDR SRAM |
| 中文描述： | 512Kx36位，1Mx18位的國防評估報告的SRAM |
| 文件頁數： | 1/17頁 |
| 文件大小： | 510K |
| 代理商： | K7Q161854A-FC10 |
512Kx36 & 1Mx18 QDR
TM
b4 SRAM
- 1 -
Rev 1.0
July. 2002
K7Q163654A
K7Q161854A
Document Title
512Kx36-bit, 1Mx18-bit QDR
TM
SRAM
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
Revision History
Rev. No.
0.0
0.1
0.2
0.3
0.4
0.5
0.6
1.0
Remark
Advance
Advance
Advance
Advance
Advance
Preliminary
Preliminary
Final
History
1. Initial document.
1. Amendment
1) Page 3,4 PIN NAME DESCRIPTION
W (4A) : from Read Control Pin to Write Control
R (8A) : from Write Control Pin to Read Control
BW
0
(7B)
,
BW
1
(7A)
,
BW
2
(5A)
,
BW
3
(5B)
:
from
Read Control Pin to Byte Wrtie Control
2) Page 7 STATE DIAGRAM
from LEAD NOP to READ NOP
1. Amendment
1) Page 8 WRITE TRUTH TABLE(x36)
BW
2
,BW
3
values for WRITE ALL BYTEs( K
↑ )
and
WRITE ALLBYTEs( K
↑ ) :
from "H" to " L"
2) Page 13 TIMING WAVE FORMS Note 2 supplement
1. 1.8V I/O supply voltage addition
1) Page 2 FEATURES
2) Page 3,4 PIN NAME V
DDQ
3) Page 10, OPERATING CONTITIONS
4) Page 11 AC TEST CONTITIONS
2. Amendment
1) Page 15 BOUNDARY SCAN ORDER EXIT
1. Icc, Isb addition
2. 1.8V Vddq addition
1. Reserved pin for high density name change from NC to Vss/SA
1. Release Icc.
1. Final SPEC release
2. Modify thermal resistance
part #
x18
x36
From
To
From
To
-20
500
520
530
600
-16
-
-
490
550
-13
-
-
460
490
-10
-
-
-
-
Draft Date
April 30, 2001
May, 13, 2001
May, 26, 2001
June, 11, 2001
Sep, 03, 2001
Nov, 30, 2001
May, 22. 2002
July, 03. 2002
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