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參數資料
型號: K7R323684M
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1Mx36 & 2Mx18 QDRTM II b4 SRAM
中文描述: 1Mx36
文件頁數: 1/18頁
文件大小: 195K
代理商: K7R323684M
- 1 -
Rev 2.0
Dec. 2003
1Mx36 & 2Mx18 QDR
TM
II b4 SRAM
K7R323684M
K7R321884M
Document Title
1Mx36-bit, 2Mx18-bit QDR
TM
II b4 SRAM
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
Revision History
Rev. No.
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
2.0
Remark
Advance
Advance
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Final
Final
History
1. Initial document.
1. Package dimension modify.
P.20 from 13mmx15mm to 15mmx17mm
1. Pin name change from DLL to Doff.
2. Vddq range change from 1.5V to 1.5V~1.8V.
3. Update JTAG test conditions.
4. Reserved pin for high density name change from NC to Vss/SA
5. Delete AC test condition about Clock Input timing Reference Level
6. Delete clock description on page 2 and add HSTL I/O comment
1. Update current characteristics in DC electrical characteristics
2. Change AC timing characteristics
3. Update JTAG instruction coding and diagrams
1. Add -FC25 part(AC Characteristics)
2. Add AC electrical characteristics.
3. Change AC timing characteristics
4. Change DC electrical characteristics(I
SB1
)
1. Change the data Setup/Hold time.
2. Change the Access Time.(tCHQV, tCHQX, etc.)
3. Change the Clock Cycle Time.(MAX value of tKHKH)
4. Change the JTAG instruction coding.
1. Change the Boundary scan exit order.
2. Change the AC timing characteristics(-25, -20)
3. Correct the Overshoot and Undershoot timing diagrams.
1. Change the JTAG Block diagram
1. Correct the JTAG ID register definition
2. Correct the AC timing parameter (delete the tKHKH Max value)
3. Change the Isb1 current
1. Change the Maximum Clock cycle time.
2. Correct the 165FBGA package ball size.
1. Final spec release
1. Delete the x8 Org. part
Draft Date
June 30, 2001
Oct. 20, 2001
Dec. 5, 2001
July, 29. 2002
Sep. 6. 2002
Oct. 7. 2002
Dec. 16, 2002
Dec. 26, 2002
Mar. 20, 2003
April. 4, 2003
Aug. 28, 2003
Dec. 1, 2003
相關PDF資料
PDF描述
K7R323684M-FC16 1Mx36 & 2Mx18 QDRTM II b4 SRAM
K7R323684M-FC20 1Mx36 & 2Mx18 QDRTM II b4 SRAM
K7R323684M-FC25 1Mx36 & 2Mx18 QDRTM II b4 SRAM
K7R321884M 1Mx36 & 2Mx18 QDRTM II b4 SRAM
K7R321884M-FC20 1Mx36 & 2Mx18 QDRTM II b4 SRAM
相關代理商/技術參數
參數描述
K7R323684M-FC16 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18 QDRTM II b4 SRAM
K7R323684M-FC20 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18 QDRTM II b4 SRAM
K7R323684M-FC20000 制造商:Samsung Semiconductor 功能描述:SRAM Chip Sync Single 1.8V 36M-Bit 1M x 36 0.45ns 165-Pin FBGA Tray
K7R323684M-FC25 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18 QDRTM II b4 SRAM
K7R640982M 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx36 & 4Mx18 & 8Mx9 QDRTM II b2 SRAM
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