- 您現(xiàn)在的位置：買賣IC網 > PDF目錄374299 > K9F5616U0B-PIB0 (SAMSUNG SEMICONDUCTOR CO. LTD.) M1 - DVI-D 6 FEET PDF資料下載
參數(shù)資料
| 型號： | K9F5616U0B-PIB0 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | M1 - DVI-D 6 FEET |
| 中文描述： | 32M的× 8位，16米x 16位NAND閃存 |
| 文件頁數(shù)： | 1/34頁 |
| 文件大小： | 604K |
| 代理商： | K9F5616U0B-PIB0 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
FLASH MEMORY
1
K9F5616U0B-DCB0,DIB0,HCB0,HIB0
K9F5608U0B-DCB0,DIB0,HCB0,HIB0
K9F5608U0B-YCB0,YIB0,PCB0,PIB0
K9F5616U0B-YCB0,YIB0,PCB0,PIB0
K9F5608U0B-VCB0,VIB0,FCB0,FIB0
Document Title
32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
Revision History
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
Revision No.
0.0
0.1
0.2
0.3
0.4
Remark
Advance
History
Initial issue.
At Read2 operation in X16 device
: A
3
~ A
7
are Don’t care ==> A
3
~ A
7
are "L"
1. I
OL
(R/B) of 1.8V device is changed.
-min. Value: 7mA -->3mA
-typ. Value: 8mA -->4mA
2. AC parameter is changed.
tRP(min.) : 30ns --> 25ns
3. WP pin provides hardware protection and is recommended to be kept
at V
IL
during power-up and power-down and recovery time of minimum
1
μ
s is required before internal circuit gets ready for any command
sequences as shown in Figure 15.
---> WP pin provides hardware protection and is recommended to be
kept at V
IL
during power-up and power-down and recovery time of
minimum 10
μ
s is required before internal circuit gets ready for any
command sequences as shown in Figure 15.
1. X16 TSOP1 pin is changed.
: #36 pin is changed from VccQ to N.C .
1. In X16 device, bad block information location is changed from 256th
byte to 256th and 261th byte.
2. tAR1, tAR2 are merged to tAR.(page 12)
(before revision) min. tAR1 = 20ns , min. tAR2 = 50ns
(after revision) min. tAR = 10ns
3. min. tCLR is changed from 50ns to 10ns.(page12)
4. min. tREA is changed from 35ns to 30ns.(page12)
5. min. tWC is changed from 50ns to 45ns.(page12)
6. Unique ID for Copyright Protection is available
-The device includes one block sized OTP(One Time Programmable),
which can be used to increase system security or to provide
identification capabilities. Detailed information can be obtained by
contact with Samsung.
7. tRHZ is divide into tRHZ and tOH.(page 12)
- tRHZ : RE High to Output Hi-Z
- tOH : RE High to Output Hold
8. tCHZ is divide into tCHZ and tOH.(page 12)
- tCHZ : CE High to Output Hi-Z
- tOH : CE High to Output Hold
Draft Date
May. 15th 2001
Sep. 20th 2001
Nov. 5th 2001
Feb. 15th 2002
Apr. 15th 2002
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html
相關PDF資料 |
PDF描述 |
|---|---|
| K9F5616U0B-YCB0 | M1 - DVI-D 10 FEET |
| K9F5616U0B-YIB0 | M1 - DVI-D 15 FEET |
| K9F5608U0B-YIB0 | 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
| K9F5608U0B-YCB0 | 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
| K9F5608U0B-DCB0 | 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K9F5616U0B-YCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
| K9F5616U0B-YIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
| K9F5616U0C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
| K9F5616U0C-D | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit 16M x 16 Bit NAND Flash Memory |
| K9F5616U0C-DCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata |
發(fā)布緊急采購，3分鐘左右您將得到回復。