
K9F6408U0A-TCB0, K9F6408U0A-TIB0
FLASH MEMORY
1
Document Title
8M x 8 Bit NAND Flash Memory
Revision History
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the
SAMSUNG branch office near you.
Revision No.
0.0
0.1
0.2
0.3
0.4
0.5
Remark
Preliminary
Preliminary
Preliminary
Preliminary
Final
History
Initial issue.
1. Revised real-time map-out algorithm(refer to technical notes)
Changed device name
1) KM29U64000AT -> K9F6408U0A-TCB0
2) KM29U64000AIT -> K9F6408U0A-TIB0
Changed the following items
Changed the following items
Changed the following item
1. Changed invalid block(s) marking method prior to shipping
- The invalid block(s) information is written the 1st or 2nd page of the
invalid block(s) with 00h data
--->The invalid block(s) status is defined by the 6th byte in the spare
area. Samsung makes sure that either the 1st or 2nd page of every
invalid block has
non-FFh
data at the column address of 517.
2. Changed SE pin description
- SE is recommended to coupled to GND or Vcc and should not be
toggled during reading or programming.
ITEM
Before(M-die)
After(A-die)
Program Time
1,000us(Max.)
500us(Max.)
Number of partial program
in the same page
10 Cycles
Main Array: 2 Cycles
Spare Array: 3 Cycles
ITEM
Before(M-die)
After(A-die)
Pin Configuration(23th Pin)
VccQ
Vcc
Absolute maximum Ratings
-
Voltage on any pin
relative to Vss
Vin : -0.6V to 6V
Vcc : -0.6V to 4.6V
VccQ : -0.6V to 6V
Vin : -0.6V to 4.6V
Vcc : -0.6V to 4.6V
Recommended operating
conditions
-
Supply voltage
VccQ : 2.7V(Min.)
/ 5.5V(Max.)
Do not support VccQ
DC and operating characteristics
-
Input high voltage(VIH)
I/O pins : 2.0V(Min.)
VccQ+0.3V(Max.)
All inputs : 2.0V(Min.)
/ Vcc+0.3V(Max.)
Except I/O pins :
2.0V(Min.) /
Vcc+0.3V(Max.)
Input and output timing levels
0.8V and 2.0V
1.5V
ITEM
Before(M-die)
After(A-die)
Data transfer from Cell
to Register (tR)
7us(Max.)
10us(Max.)
Draft Date
April 10th 1999
July 23th 1999
Sep. 15th 1999
Oct. 20th 1999
Jan. 10th 2000
July 17th 2000
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html