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參數(shù)資料
| 型號(hào)： | K9K1208U0M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64M x 8 Bit NAND Flash Memory |
| 中文描述： | 6400 × 8位NAND閃存 |
| 文件頁(yè)數(shù)： | 1/26頁(yè) |
| 文件大小： | 354K |
| 代理商： | K9K1208U0M |
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K9K1208U0M-YCB0, K9K1208U0M-YIB0
FLASH MEMORY
1
Document Title
64M x 8 Bit NAND Flash Memory
Revision History
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the
right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you
have any questions, please contact the SAMSUNG branch office near your office.
Revision No
0.0
0.1
0.2
0.3
Remark
Preliminary
Preliminary
Final
History
1. Initial issue
- The followings are disprepancy items between K9K5608U0M (256Mb
DDP) and K9K1208U0M (512Mb DDP).
AC Characteristics
K9K5608U0M
1. Changed Input / Output Capacitance
- Input / Output Capacitance (Max.) : 20 pF --> 30pF
- Input Capacitance (Max.) : 20 pF --> 30pF
1. Changed SE pin description
- SE is recommended to coupled to GND or Vcc and should not be
toggled during reading or programming.
1. Changed don’t care mode in address cycles
- *X can be "High" or "Low" => *L must be set to "Low"
2. Explain how pointer operation works in detail.
3. Renamed GND input (pin # 6) on behalf of SE (pin # 6)
- The SE input controls the access of the spare area. When SE is high,
the spare area is not accessible for reading or programming. SE is rec
ommended to be coupled to GND or Vcc and should not be toggled
during reading or programming.
=> Connect this input pin to GND or set to static low state unless the
sequential read mode excluding spare area is used.
4. Updated operation for tRST timing
- If reset command(FFh) is written at Ready state, the device goes into
Busy for maximum 5us.
K9K1208U0M
Read Cycle Time (tRC)
Min. 50ns
Min. 60ns
Write Cycle Time (tWC)
Min. 50ns
Min. 60ns
WE High hold Time (tWH)
Min. 15ns
Min. 25ns
Data Hold Time (tDH)
Min. 10ns
Min. 15ns
RE High Hold Time (tREH)
Min. 15ns
Min. 25ns
Draft Date
June 19th 2000
June 24th 2000
July 17th 2000
Nov. 20th 2000
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K9K1208U0M-YCB0 | 64M x 8 Bit NAND Flash Memory |
| K9K1208U0M-YIB0 | 64M x 8 Bit NAND Flash Memory |
| K9K1G08U0M-YCB0 | 128M x 8 Bit NAND Flash Memory |
| K9K1G08U0M-YIB0 | 128M x 8 Bit NAND Flash Memory |
| K9K2G08U0A | TV 8C 8#16 PIN WALL RECP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9K1208U0M-YCB0 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64M x 8 Bit NAND Flash Memory |
| K9K1208U0M-YIB0 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64M x 8 Bit NAND Flash Memory |
| K9K1216D0C | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64M x 8 Bit , 32M x 16 Bit NAND Flash Memory |
| K9K1216Q0C | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64M x 8 Bit , 32M x 16 Bit NAND Flash Memory |
| K9K1216U0C | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:64M x 8 Bit , 32M x 16 Bit NAND Flash Memory |
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