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參數資料
型號: K9W8G08U1M
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512M x 8 Bit / 256M x 16 Bit NAND Flash Memory
中文描述: 512M × 8位/ 256M × 16位NAND閃存
文件頁數: 1/38頁
文件大小: 601K
代理商: K9W8G08U1M
FLASH MEMORY
1
K9K4G08U0M
K9K4G16Q0M
K9K4G16U0M
K9K4G08Q0M
Document Title
512M x 8 Bit / 256M x 16 Bit
NAND Flash Memory
Revision History
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the
right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you
have any questions, please contact the SAMSUNG branch office near your office.
Revision No
0.0
0.1
0.2
0.3
0.4
0.5
Remark
Advance
Preliminary
Preliminary
Preliminary
Preliminary
History
1. Initial issue
1. Add two-K9K4GXXU0M-YCB0/YIB0 Stacked Package
1. The 3rd Byte ID after 90h ID read command is don’t cared.
The 5th Byte ID after 90h ID read command is deleted.
1. The K9W8G16U1M-YCB0,YIB0,PCB0,PIB0 is deleted in line up.
2. Note is added.
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for
durations of 20 ns or less.)
3. Pb-free Package is added.
K9K4G08Q0M-PCB0,PIB0
K9K4G08U0M-PCB0,PIB0
K9K4G16U0M-PCB0,PIB0
K9K4G16Q0M-PCB0,PIB0
K9W8G08U1M-PCB0,PIB0
1. Added Addressing method for program operation.
1. The tADL(Address to Data Loading Time) is added.
- tADL Minimum 100ns
-
tADL is the time from the WE rising edge of final address cycle
to the WE rising edge of first data cycle at program operation.
2. Added addressing method for program operation
3. PKG(TSOP1) Dimension Change
Draft Date
Feb. 19. 2003
Mar. 31. 2003
Apr. 9. 2003
Apr. 30. 2003
Jan. 27. 2004
May.31. 2004
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