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參數(shù)資料
| 型號(hào)： | KK74AC652N |
| 廠商： | KODENSHI CORP. |
| 英文描述： | Octal 3-State Bus Transceivers and D Flip-Flops High-Speed Silicon-Gate CMOS |
| 中文描述： | 八路三態(tài)總線收發(fā)器和D觸發(fā)器高速硅柵CMOS |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 404K |
| 代理商： | KK74AC652N |
TECHNICAL DATA
Octal 3-State Bus Transceivers
and D Flip-Flops
High-Speed Silicon-Gate CMOS
K K
74AC652
ORDERING INFORMATION
KK
74AC652N Plastic
KK
74AC652DW SOIC
T
A
= -40
°
to 85
°
C for all packages
The
KK
74AC652 is identical in pinout to the LS/ALS652,
HC/HCT652. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS outputs.
These devices consists of bus transceiver circuits, D-type flip-flop,
and control circuitry arranged for multiplex transmission of data directly
from the data bus or from the internal storage registers. Direction and
Output Enable are provided to select the read-time or stored data function.
Data on the A or B Data bus, or both, can be stored in the internal D flip-
flops by low-to-high transitions at the appropriate clock pins (A-to-B
Clock or B-to-A Clock) regardless of the select or enable or enable
control pins. When A-to-B Source and B-to-A Source are in the real-time
transfer mode, it is also possible to store data without using the internal
D-type flip-flops by simultaneously enabling Direction and Output
Enable. In this configuration each output reinforces its input. Thus, when
all other data sources to the two sets of bus lines are at high impedance,
each set of bus lines will remain at its last state.
The
KK
74AC652 has noninverted outputs.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
μ
A, 0.1
μ
A @ 25
°
C
High Noise Immunity Characteristic of CMOS Devices
Outputs Source/Sink 24 mA
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 24=V
CC
PIN 12 = GND
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KK74AC74 | Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| KK74AC74D | Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| KK74AC74N | Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| KK74AC86 | Quad 2-Input Exclusive OR Gate High-Speed Silicon-Gate CMOS |
| KK74AC86D | Quad 2-Input Exclusive OR Gate High-Speed Silicon-Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KK74AC74 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| KK74AC74D | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| KK74AC74N | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| KK74AC86 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Quad 2-Input Exclusive OR Gate High-Speed Silicon-Gate CMOS |
| KK74AC86D | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Quad 2-Input Exclusive OR Gate High-Speed Silicon-Gate CMOS |
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