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參數(shù)資料
| 型號(hào)： | KK74HC651AN |
| 廠商： | KODENSHI CORP. |
| 英文描述： | Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS |
| 中文描述： | 八路三態(tài)總線收發(fā)器和D觸發(fā)器高性能硅柵CMOS |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 361K |
| 代理商： | KK74HC651AN |
TECHNICAL DATA
K K
74HC651A
Octal 3-State Bus Transceivers
and D Flip-Flops
High-Performance Silicon-Gate CMOS
ORDERING INFORMATION
KK
74HC651AN Plastic
KK
74HC651ADW SOIC
T
A
= -55
°
to 125
°
C for all packages
The
KK
74HC651A is identical in pinout to the LS/ALS651. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
These devices consist of bus transceiver circuits, D-type flip-flop, and
control circuitry arranged for multiplex transmission of data directly from
the data bus or from the internal storage registers. Direction and Output
Enable are provided to select the read-time or stored data function. Data
on the A or B Data bus, or both, can be stored in the internal D flip-flops
by low-to-high transitions at the appropriate clock pins (A-to-B Clock or
B-to-A Clock) regardless of the select or enable or enable control pins.
When A-to-B Source and B-to-A Source are in the real-time transfer
mode, it is also possible to store data without using the internal D-type
flip-flops by simulta-neously enabling Direction and Output Enable. In
this configuration each output reinforces its input. Thus, when all other
data sources to the two sets of bus lines are at high impedance, each set of
bus lines will remain at its last state.
The
KK
74HC651A has inverted outputs.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
μ
A
High Noise Immunity Characteristic of CMOS Devices
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 24=V
CC
PIN 12 = GND
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KK74HC652A | Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS |
| KK74HC74A | Dual D Flip-Flop with Set and Reset |
| KK74HC74AD | Dual D Flip-Flop with Set and Reset |
| KK74HC74AN | Dual D Flip-Flop with Set and Reset |
| KK74HC75A | Dual 2-Bit Transparent Latch High-Performance Silicon-Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KK74HC652A | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS |
| KK74HC74A | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual D Flip-Flop with Set and Reset |
| KK74HC74AD | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual D Flip-Flop with Set and Reset |
| KK74HC74AN | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual D Flip-Flop with Set and Reset |
| KK74HC75A | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Dual 2-Bit Transparent Latch High-Performance Silicon-Gate CMOS |
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