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參數資料
| 型號： | KM416S1021CT-G7 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512K x 16Bit x 2 Banks Synchronous DRAM with SSTL interface |
| 中文描述： | 為512k × 16 × 2銀行同步DRAM接口的薩里衛星技術有限公司 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 78K |
| 代理商： | KM416S1021CT-G7 |
KM416S1021C
REV. 1. May '98
CMOS SDRAM
Preliminary
The KM416S1021C is 16,777,216 bits synchronous high data
rate Dynamic RAM organized as 2 x 524,288 words by 16 bits,
fabricated with SAMSUNG
′
s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable burst
length and programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance mem-
ory system applications.
JEDEC standard 3.3V power supply
SSTL_3 (Class II) compatible with multiplexed address
Dual banks operation
MRS cycle with address key programs
- CAS latency (2 & 3)
- Burst length (1, 2, 4, 8 & Full page)
- Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system
clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
GENERAL DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
512K x 16Bit x 2 Banks Synchronous DRAM with SSTL interface
Samsung Electronics reserves the right to
change products or specification without
notice.
*
Bank Select
Data Input Register
512K x 16
512K x 16
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
Timing Register
ORDERING INFORMATION
* KM416S1021CT-GS : CL=2 only
Part No.
Max Freq.
143MHz
100MHz(CL=2)
125MHz
Interface
Package
KM416S1021CT-G7
KM416S1021CT-GS
KM416S1021CT-G8
SSTL_3
(Class II)
54
TSOP(II)
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| KM416S1021CT-G8 | 512K x 16Bit x 2 Banks Synchronous DRAM with SSTL interface |
| KM416S1021CT-GS | 512K x 16Bit x 2 Banks Synchronous DRAM with SSTL interface |
| KM416S1120D | 512K x 16bit x 2 Banks Synchronous DRAM LVTTL |
| KM416S16230A | 4M x 16Bit x 4 Banks Synchronous DRAM(4M x 16位 x4組同步動態RAM) |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| KM416S1021CT-G8 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16Bit x 2 Banks Synchronous DRAM with SSTL interface |
| KM416S1021CT-GS | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16Bit x 2 Banks Synchronous DRAM with SSTL interface |
| KM416S1120D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL |
| KM416S1120DT-G/F10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL |
| KM416S1120DT-G/F6 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL |
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