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參數(shù)資料
| 型號： | L9705 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | DOUBLE QUAD CONTACT INTERFACE CIRCUIT |
| 中文描述： | 雙四接觸界面電路 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 1861K |
| 代理商： | L9705 |
ELECTRICAL CHARACTERISTICS
(V
S
= 5 to 25V, V
CC
= 4.75 to 5.25V, V
bat
-0.5V < V
S ,
< V
bat
-1V ,
Tj
= –40 to 150
°
C unless otherwise specified.)
Symbol
V
ENL
Parameter
Test Condition
Min.
-0.3
Typ.
Max.
0.8
Unit
V
Enable Input Voltage LOW
(device activated)
Enable Input Voltage HIGH
Enable Input Threshold
Hysteresis
Enable Input Current
V
ENH
V
ENh
2.4
200
V
CC
800
V
420
mV
I
EN
2.4V < V
EN
< V
CC
0V < V
EN
< 0.8V
0 < I
OUT
< 100
μ
A
OUT status = HIGH; V
OUT
= 0
I
OUT
= -1mA
OUT status = LOW; V
OUT
= 5.5V
0 < VOUT < V
CC
EN = LOW; R
IN
= 1K
EN = LOW; R
IN
= 1K
EN = HIGH; I
IN
= 30mA
I
IN
= -30mA
5V
<
V
S
<16V;
V
GND
≤
0.1V
S
V
BAT
≤
0.1V
BAT
5V
<
V
S
<16V;
V
GND
≤
0.1V
S
V
BAT
≤
0.1V
BAT
5V
<
V
S
<
16V;
V
GND
≤ 0
.1V
S
V
BAT
≤
0.1V
BAT
5V
<
V
S
<16V;
V
GND
≤
0.1V
S
V
BAT
≤
0.1V
BAT
5V
<
V
S
<16V;
V
GND
≤
0.1V
S
V
BAT
≤
0.1V
BAT
5V
<
V
S
<16V;
V
GND
≤
0.1V
S
V
BAT
≤
0.1V
BAT
EN = HIGH (t
ENH
>20
μ
s)
V
S
= 5 to 16V; T
j
= -40 to 85
°
C
all contact open
all contact closed
V
BAT
≤
0.1V
BAT
EN = LOW
EN = LOW
C
OUT
≤
50pF
-5
4
-1
5
μ
A
μ
A
V
mA
V
mA
μ
A
V
V
V
V
K
V
OUTH
I
OUT
V
OUTL
I
OUT
I
OUT TS
V
IN 1,4
V
IN 5,8
V
IN
Output Voltage HIGH
Output Current
Output Voltage LOW
Output Current
Output Tristate Current
Input Voltage (device active)
Input Voltage (device active)
Input VoltageDuring Clamp
(device disabled)
Input Resistor LOW Threshold
(note 1)
Input Resistor LOW Threshold
(note 1)
Input Resistor HIGH Threshold
(note 1)
Input Resistor HIGH Threshold
(note 1)
Input Resistor Threshold Ratio
(note 1)
Input Resistor Threshold Ratio
(note 1)
Quiescent Current
V
CC
- 0.1
0.5
0.2
-5
V
CC
2
0.4
-20
0.5
V
S
- 0.4
2
V
S
+2
-0.3
0.05
V
S
- 2
0.4
V
S
+0.3
-2
1.8
V
S
- 1.5
1.5
V
S
+1
-1
4
R
IL 1,4
R
IL 5,8
1.8
4.8
K
R
IH 1,4
5.3
20
K
R
IH 5,8
6.5
29
K
R
IL
0.65
0.75
0.85
R
IH
0.65
0.75
0.85
I
QC
20
40
μ
A
I
QS
I
QS
Quiescent Current
Quiescent Current
Quiescent Current
Quiescent Current
Quiescent Current
Delay Time/Output (EN LOW to
Output Data Ready) (note 3)
Delay Time/Tristate (EN HIGH
to Output Tristate) (note 3)
Delay Time Input-Output (note 3)
10
35
25
5
8
15+
μ
A
μ
A
μ
A
mA
mA
μ
s
Σ
I
IN
(2)
I
QC
I
QS
t
do
3R
IN
*C
IN
10
t
dTS
C
OUT
≤
50pF
μ
s
t
dIO
EN = LOW; C
OUT
=
50pF
6
ms
NOTES:
1) The input resistor threshold value is a resistor value from the IN-pin to ground at which the corresponding output changes its status (fig.4)
2)
Σ
I
IN
is the sum of the IN5 to IN8 input currents.
3) The delay times are defined from the crossing point of 50% initiating signal amplitude to the crossing point of 50% output signal amplitude
L9705
3/8
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