
LA3883M
PS No.A0794-7/7
Block Diagram and Test Circuit
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
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No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
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without the prior written consent of SANYO Semiconductor Co.,Ltd.
This catalog provides information as of May, 2007. Specifications and information herein are subject
to change without notice.
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+
BUFFER
OSC
MIX
LPF
AMP
Q.DET
DC-C
DET
AFC
CIAMP
MUTE
DRIVE
HOLE
DET
MRC
CONT
MUTE
AMP
MUTE
AMP
DE-
ENPHA
SUBTRACTION
CIRCUIT
(MAIN)
SUBTRACTION
CIRCUIT
(SUB)
SUB
GATE
Control
BPF
3.5FH
TRAP
3.5FH
BPF
MAIN
GATE
Control
NOISE
DET
/AGC
HPF
PULSE
COUNT
2.7FH
BPF
1.3FH
BPF
DE-
ENPHA
Q-DET
PLL
CONT
DRIVER
HCC
SW
MATRIX
NOISE
AMP
CHARGE
DIS-CHARGE
330
Ω
50
Ω
330
Ω
0.047
μF
MIX
IN PUT
MIX-OUT
MUTE
FM-IF-IN
SFE10.7MS2-A
50
Ω
10pF
OSC-GND
0V
MAIN/SUB
DIVSRSITY
FM-IF-IN
IF-
OSC-VCC
22000pF
100k
Ω
10k
Ω
10k
Ω
100k
Ω
100k
Ω
1M
Ω
3.3k
Ω
1000pF
22k
Ω
2k
Ω
4.7
μF
1
μF
4.7
μF
4.7
μF
1000pF
+
51k
Ω
10k
Ω
100k
Ω
22k
Ω
15k
Ω
56k
Ω
10
μF
+
1
μF
2200pF
6.8k
Ω
22k
Ω
2k
Ω
0.022
μF
AFC-IN
22k
Ω
10
μF
+
10
μF
+
1
μF
+
1
μF
+
1
μF
2200pF
R
L
BIL-IND(Active-Low)
NC-IN
DET-OUT
SD-OUT
ST-IND
MRC-AC-IN
IF-VCC
MUTE
ATT
MUTE
DRIVE
STOP-REQ.
(SW3)
+
1
μF
+
0.47
μF
5V
SNC
IF
Limitter AMP
FM
S-METER
FM-SD
HCC