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參數資料
| 型號： | LA76936Y |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP64 |
| 封裝： | 0.600 INCH, DIP-64 |
| 文件頁數： | 4/6頁 |
| 文件大小： | 115K |
| 代理商： | LA76936Y |
LA7693X series
No.A1102-4/6
Block Diagram 1 LA76931J/933J
+
1
64
2
63
3
62
4
61
5
60
6
59
7
58
8
57
9
56
55
54
12
53
13
52
14
51
15
50
49
17
48
18
47
19
46
20
45
21
44
22
43
23
24
25
26
39
27
38
28
37
29
36
30
35
31
34
32
33
0.01
F
0.015
F
(M)
0.47
F
(M)
3k
100
F
V
DD
HOR
OUT
1CHIP GND
VER
OUT
(METAL FILM)
V RAMP
E/W
OUT
(933)
NC
R
OUT
G
OUT
B
OUT
120
4.7k
+
0.015
F
1
F
10k
1500pF
+
0.01
F
100
F
RGB
9V
42
0.01
F
0.022
F
0.022
F
10pF
0.01
F
100
F
5V
VOLUME
OUT
FM OUT
+
47k
20k
750
100
47k
SA
W
FIL
0.01
F
0.047
F
0.47
F
0.1
F
4.43M
0.1
F
100
F
+
10
F
ABL
INT0/P00
RF-AGC
IF
IN
OUT
VIDEO
SVO/FSC
V
CC
INT
-V
V
CC
:5V
VCD
0.01
F
100
F
+
V
DD
AN4/P04
AN5/P05
AN6/P06
AN7/P07
INT1/P01
P02
INT3/P03
IRDA
PWM1/P14
PWM2/P15
P17
PWM3/P16
SDA1/P12
SCK1/P13
+
1
F
39k
EXT
-AUDIO
IN
VM
OUT(933)
16
10
11
+
+ 1F
EXT
-V
CR
0.1
F
CB
+ 1F
DVD-Y
+ 1F
0.1
F
YC-Y
YC-C
FBP
V
DD
AFF
RESET
CPU
TST
R
CPU
TST
G
CPU
TST
B
CVBS
PDC
ENABLE
VS
HS
R
G
B
FS
I
DA
T
A
CLOCK
C_SYNC
+ 1F
+
0.01
F
100
F
+
1
F
2.2
F
+
0.47
F
560
12k
18pF
390k
680k
RF
REC
SPLL
TRAP
OSD
DRIVE/OUT
-OFF
VIDEO
AMP
VIDEO
DET
SOUND
DET
SW
TRAP
500K
DET
BPF
SW
BPF
FM
DET
FM
AMP
LIM
AMP
DC
REST
V/Y
SW
DL
SHARP
BS
SG
E/W
(933)
VER
RAMP
HOR
V
CC
HOR
OUT
ABL
ACL
BER
SEP
SYNC
SEP
BER
C/D
FBP
AFC2
PHASE
SHIFTER
CLOCK
CONTROL
AFC1
1/256
HOR
C/D
HOR
VC0
CLOCK
CONTROL
TIMER
0
ADC
BUS
OSD
BASE
TIMER
CPU
CORE
RAM
ROM
OSD
SW
I/0
P
O
RT
1
I/0
POR
T
0
CONTRAST
BRIGHT
BUS
RST
PLL
HS
VS
RGB
MA
TRIX
COLOR
CLAMP
SW
1H
DL
CLAMP
DC
ADJ
SW
YC
SW
BPF
ACC
APC1
VCO
VXO
DDS
APC2
TINT
PA
L
S
W
DEMO
FSC
SW
CONTRAST
BRIGHT
VIDEO
SW
(933)
VM
(933)
DC
VOL
VIF
AMP
IF
AGC
AFT
DAH
VCO
CLMP
NC(933)
42
41
40
0.33
F
+
CPU GND
100
150k
1M
0.033
F
2.2
F
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相關代理商/技術參數 |
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|---|---|
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