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參數資料
| 型號： | LA9239T |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO36 |
| 封裝： | TSSOP-36 |
| 文件頁數： | 3/9頁 |
| 文件大小： | 76K |
| 代理商： | LA9239T |
No. 7131-3/9
LA9239T
Explanation of Operation
(1) RF amplifier
The RF signal is generated by inputting (A+C) from FIN2 (pin 8) and (B+D) from FIN1 (pin 7) and adding the two.
The EFM signal is output from the RFSM (pin 33) via the preamplifier, gain switch, RFAGC circuit, and 3T
compensation circuit. The RFSUM output D range is 1 to 4 V. 3T compensation can be done according to the band
through the EQS (pin 18) control pin.
The gain switch enables replay of CD and CD-RW disks, and when GHS (pin 16) level is made Hi (CD-RW mode), a
gain of 14 dB can be obtained. In the CD mode, the gain is 0 dB.
The on-chip AGC circuit has a variable range of ±6 dB. The peak level controls the RFAGC level, and the bottom
level controls the DC level of RF. The respective frequency response characteristics can be changed with the external
capacitors connected to PHC (pin 2) and BHC (pin 1).
The response frequency is proportional to the capacitance of the PHC and BHC capacitors.
When a defect is detected in the DSP, AGC control can be changed to the hold status (by making RHLD (pin 32) Hi)
to prevent the RF signal from becoming unstable.
(2) Focus error amplifier
The focus error signal is generated by inputting (A+C) to FIN2 (pin 8) and (B+D) to FIN1 (pin 7), passing these
signals through the focus balance adjustment VCA, and extracting the difference between the two ((B+D)–(A+C)).
The FE signal is gain controlled by FE-VCA and output to FE (pin 28). The FE signal gain can be set with the resistor
connected between FE and FE- (pin 29).
The focus balance adjustment VCA is controlled by FBAL (pin 21), and FE-VCA is controlled by SGC (pin 19). A
gain of +12 dB for the FE signal gain is obtained in the RW mode by making the GS level Hi.
Note: The polarity of the FE output in relation to the FIN1 input is common-mode output.
(3) Tracking error amplifier
The tracking error signal is generated through input to E (pin 9) and F (pin 10), passing the signals through the
tracking balance adjustment VCA, and detecting their difference. The TE signal is gain controlled at TE-VCA and
output from TE (pin 26). The TE signal gain can be set with the resistor connected between TE and TE- (pin 27). The
tracking balance adjustment VCA is controlled by TBAL (pin 20), and TE-VCA is controlled by SGC (pin 19).
The TE signal for the TES comparator is output from TS (pin 23). The TS signal level must meet the TES comparator
level in the DSP. Setting of this level is performed with the pickup output and the resistor between the E and F inputs.
In the RW mode, a gain of +12 dB for TE and TS signal gain is obtained by making the GHS (pin 16) level Hi (same
as for RF). An on-chip band switch is also provided to support high-speed seek for the TS signal, which is controlled
with TSH (pin 22). The band can be set with the capacitance between TSS (pin 25) and TS.
Note: The polarity of the TE output in relation to the E input is inverted output, and the polarity of the TS output in
relation to the E input is also inverted output.
(4) APC (auto laser power control)
The APC controls the pickup laser power. Since CD-RW disks are also supported, a laser power-up (+20%) function
is also provided. Laser ON/OFF and laser power-up control are performed with LDON (pin 15).
(5) REFL detection (reflected light detection) and focus detection
The reflected light amount signal from the disk is added to the FIN1 and FIN2 inputs (A+B+C+D) and fetched. It is
then gain controlled at REFL-VCA and output from REFL (pin 30) to the DSP. This output signal is used to control
SGC (pin 19) to secure the D range of the servo signal in relation to disk irregularities. The amount of light is judged
by the DSP and SGC control is performed. REFL-VCA is controlled by SGC. During RW replay, the REFL gain is
increased by 12 dB (GHS = Hi).
The REFL signal is also used as a signal for focus detection.
Note: The polarity of the REFL output in relation to the FIN1 input is common-mode output.
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