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參數(shù)資料
| 型號： | LC72709E |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | QIP-44 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 194K |
| 代理商： | LC72709E |
No. 5876-2/16
LC72709E, 72709W
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VDD max
–0.3 to +7.0
V
Input voltage
VIN1
CE, CL, DI, RST, STNBY
–0.3 to +7.0
V
VIN2
Pins other than VIN1
–0.3 to VDD +0.3
V
Output voltage
VOUT1
DO
–0.3 to +7.0
V
VOUT2
Pins other than VOUT1
–0.3 to VDD +0.3
V
Output current
IOUT
BLOCK, FLOCK, BCK, FCK, DO
0 to 4.0
mA
Allowable power dissipation
Pd max
LC72709E
250
mW
LC72709W
200
mW
Operating temperature
Topr
Ta
≤ 85°C
–40 to +85
°C
Storage temperature
Tstg
–55 to +125
°C
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Supply voltage
VDD
4.5
5.5
V
Input high-level voltage
VIH
CL, CE, DI, RST, STNBY
0.7 VDD
5.5
V
Input low-level voltage
VIL
CL, CE, DI, RST, STNBY
VSS
0.3 VDD
V
Oscillator frequency
FOSC
This IC operates at frequencies within a
7.2
MHz
±250 ppm precision
Input sensitivity
VXI
With a capacitance-coupled sine wave input
400
1500
mVrms
to XIN
Input amplitude
VMPX
MPXIN, 100% modulation composite
150
500
mVrms
[Serial I/O*]
Clock low-level time
tCL
CL
0.7
s
Clock high-level time
tCH
CL
0.7
s
Data setup time
tSU
CL, DI
0.7
s
Data hold time
tHD
CL, DI
0.7
s
CE wait time
tEL
CL, CE
0.7
s
CE setup time
tES
CL, CE
0.7
s
CE hold time
tEH
CL, CE
0.7
s
Data latch change time
tLC
CE
0.7
s
Data output time
tDD0
DO, CL
277
555
ns
Layer 4 CRC change time
tCRC
CRC4, CL
0.7
s
Allowable Operating Ranges at Ta = –40 to +80°C, VSS = 0 V
Note *: See the serial data timing chart.
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Output high-level voltage
VOH1
IO = 2 mA, BCK, FCK, BLOCK, FLOCK,
VDD – 0.4
V
CRC4, INT, CLK16, DATA, IC1, IC2
Output low-level voltage
VOL1
IO = 2 mA, applies to the same pins as VOH1
0.4
V
VOL2
IO = 2 mA, DO
0.4
V
Input high-level current
IIH1
VIN = 5.5 V, CE, CL, DI, RST, STNBY
1.0
A
IIH2
VIN = VDDD, input pins other than IIH1
1.0
A
Input low-level current
IIL
VIN = VSSD, CL, CE, DI, RST, STNBY,
–1.0
A
TP0 to TP8, TPC1 to 2, TOSEL1 to 2, TEST
Input resistance
RMPX
MPXIN-Vssa, f = 0 to 100 kHz
50
k
Reference supply voltage output
VREF
VREF, Vdda = 5 V
2.5
V
Bandpass filter center frequency
FC
FLOOUT
76.0
kHz
–3 dB bandwidth
FBW
FLOUT
19.0
kHz
In-band delay time difference
DGD
FLOUT
±5
s
Gain
MPXIN-FLOUT, f = 76 kHz
20
dB
ATT1
FLOUT, f = 50 kHz
25
dB
Stop band attenuation
ATT2
FLOUT, f = 100 kHz
15
dB
ATT3
FLOUT, f = 30 kHz
50
dB
ATT4
FLOUT, f = 150 kHz
50
dB
Electrical Characteristics at VDD = 4.5 to 5.5 V, in the allowable operating ranges
Continued on next page.
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