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參數資料
| 型號： | LC74723 |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, SDIP-24 |
| 文件頁數： | 5/12頁 |
| 文件大小： | 245K |
| 代理商： | LC74723 |
Pin Assignment
Pin Functions
No. 4841-2/12
LC74723, 74723M
Pin No.
Symbol
Function
Description
1VSS1
Ground
Ground (digital system ground)
2
XtalIN
Crystal oscillator connection
Used either for connecting the external crystal and capacitor that are used for internal
3
XtalOUT
synchronization signal generation, or to input an external clock signal (2fsc or 4fsc).
4
CTRL1
Crystal oscillator input switching
Switches the LC74723 between external clock input mode and crystal oscillator mode.
Low = crystal oscillator mode, high = external clock mode
5
CSYNOUT
Composite synchronization
Outputs a composite synchronization signal. Outputs the crystal oscillator clock on
signal output
reset, i.e., when RST is low.
6
OSCIN
LC oscillator
Connections for the coil and capacitor that form the oscillator used to generate the
7
OSCOUT
character output dot clock.
Outputs the result of judging whether or not there is an external synchronization
8
SYNCJDG
External synchronization signal
signal. Outputs a high level when an external synchronization signal is present.
judgment output
Outputs the dot clock (LC oscillator) on reset, i.e., when RST is low. (The LC74723
can be set not to output this signal on reset using control data.)
9CS
Enable input
Enables serial data input. Serial data input is enabled when this input is low. There is
a built-in pull-up resistor on this input (hysteresis input).
10
SCLK
Clock input
Inputs the clock signal used for serial data input.
There is a built-in pull-up resistor on this input (hysteresis input).
11
SIN
Data input
Serial data input. There is a built-in pull-up resistor on this input (hysteresis input).
12
VDD2
Power supply
Power supply (analog system power supply) for composite video signal level
adjustment.
13
CVOUT
Video signal output
Composite video signal output
14
NC
Must be either connected to ground or left open.
15
CVIN
Video signal input
Composite video signal input
16
VDD1
Power supply
Power supply (+5 V: digital system power supply)
Video signal input for the built-in sync separator circuit (When the built-in sync
17
SYNIN
Sync separator circuit input
separator circuit is not used, input either the horizontal synchronization signal or the
composite synchronization signal.)
18
SEPC
Sync separator circuit bias voltage Built-in sync separator circuit bias voltage monitor
19
SEPOUT
Composite synchronization
Outputs the built-in sync separator circuit's composite synchronization signal.
signal output
(Outputs the SYNIN input signal when the built-in sync separator circuit is not used.)
Inputs the vertical synchronization signal by integrating the output signal from the
20
SEPIN
Vertical synchronization signal input
SEPOUT pin.
An integration circuit must be connected between the SEPOUT pin and this pin. Hold
at VDD1 if this input is unused.
Continued on next page.
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