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參數資料
| 型號： | LC74725 |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, SDIP-24 |
| 文件頁數： | 15/16頁 |
| 文件大小： | 330K |
| 代理商： | LC74725 |
No. 5213-8/16
LC74725, 74725M
Display Control Commands
Display control commands have an 8-bit format and are transferred using the serial input function. Commands consist of
a command identification code in the first byte and command data in the following bytes. The following commands are
supported.
① COMMAND0: Display memory (VRAM) write address setup command
② COMMAND1: Display character data write command
③ COMMAND2: Vertical display start position and vertical character size setup command
④ COMMAND3: Horizontal display start position and horizontal character size setup command
⑤ COMMAND4: Display control setup command
⑥ COMMAND5: Display control setup command
Display Control Command Table
Once written, the command identification code in the first byte is stored until the next first byte is written. However,
when the display character data write command (COMMAND1) is written, the LC74725/M locks into the display
character data write mode, and another first byte cannot be written.
When a high level is input to the CS pin, the LC74725/M is set to COMMAND0 (display memory write address setup
mode).
① COMMAND0 (Display memory write address setup command)
First byte
Second byte
Command
Command identification code
Data
7654321076543210
COMMAND0
1000
V3
V2
V1
V0
000
H4
H3
H2
H1
H0
Set write address
COMMAND1
10010000
at
0
c5
c4
c3
c2
c1
c0
Write character
COMMAND2
10100
VS
0
VS
0
FS
VP
Set vertical display start position and
20
10
543210
vertical character size
COMMAND3
1011
EGP
HS
0
HS
0
LC
HP
Set horizontal display start position
20
10
543210
and horizontal character size
COMMAND4
1100
TST
RAM
OSC
SYS
0
EGL
NON
EG
BK
RV
DSP
Display control
MOD
ERS
STP
RST
1
0
ON
COMMAND5
1
0
1
BCL
PH
RSN
INT
0
MUT
MOD
CTL
SEL
Synchronizing signal control
0320
Register content
DA0 to DA7
Register name
State
Function
Note
7—
1
6—
0
Command 0 identification code
5—
0
Set the display memory write address.
4—
0
3V3
0
1
2V2
0
1
Display memory row address (0 to 9 hexadecimal)
1V1
0
1
0V0
0
1
相關PDF資料 |
PDF描述 |
|---|---|
| LC74725M | ON-SCREEN DISPLAY IC, PDSO24 |
| LC7472M | ON-SCREEN DISPLAY IC, PDSO24 |
| LC74730M | ON-SCREEN DISPLAY IC, PDSO30 |
| LC74731W | ON-SCREEN DISPLAY IC, PQFP64 |
| LC74731W | ON-SCREEN DISPLAY IC, PQFP64 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LC74725M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
| LC7472M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-screen Video Display Controller for NTSC or PAL-M |
| LC7472NM9048 | 制造商:Panasonic Industrial Company 功能描述:IC |
| LC7472NM9056 | 制造商:Panasonic Industrial Company 功能描述:IC |
| LC74730M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
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