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參數資料
型號: LC74761
廠商: SANYO SEMICONDUCTOR CO LTD
元件分類: 畫面疊加
英文描述: ON-SCREEN DISPLAY IC, PDIP30
封裝: SDIP-30
文件頁數: 4/20頁
文件大小: 242K
代理商: LC74761
Second byte
Register content
DA0 to DA7
Register name
State
Function
Note
7
0
Second byte identification code
6
HALF
0
Normal mode
INT
1
Half internal synchronous mode
5
P14OUT
0
Half tone output
Selects P14 (3.58/4.43) output.
SEL
1
High output in internal synchronous mode
4
SECAM
0
In SECAM mode, only the character frame area is on.
Selects the CVCR “on” period.
SEL
1
In SECAM mode, the entire character display area is on.
3
IOS
0
Sets the mode setting pin to be an input pin.
Switches the input/output direction of
1
Sets the mode setting pin to be an output pin.
the mode setting pins.
2
BCOL1
0
Determines whether a background color
1
is displayed. (Only valid in internal
1
BCOL0
0
synchronization mode.)
1
0
CBOFF
0
Outputs a color burst signal.
Only valid when either BCOL0 is 1 or
1
Stops the output of color burst signals.
BCOL1 is 1.
Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0.
8
COMMAND70: Display Control Setting Command 4
First byte
Register content
DA0 to DA7
Register name
State
Function
Note
7
1
6
1
The command 7 identification code:
5
1
sets display control parameters.
4
1
3
0
Expansion command 0 identification code
2
0
1
0
LINS
0
Selects the lower 6 bits (bits 0 to 5)
Selects the upper or lower six bits when
1
Selects the upper 6 bits (bits 6 to B)
halftone output line mode is specified.
Second byte
Register content
DA0 to DA7
Register name
State
Function
Note
7
0
Second byte identification code
6
VCO
0
VCO frequency is 14.12 MHz
Selects VCO oscillation frequency.
SELECT1
1
VCO frequency is 7.07 MHz
5
LIN5
0
Turns off (low) sixth line halftone output.
Used for the line 12 setting when LINS
1
Turns on (high) sixth line halftone output.
is high.
4
LIN4
0
Turns off (low) fifth line halftone output.
Used for the line 11 setting when LINS
1
Turns on (high) fifth line halftone output.
is high.
3
LIN3
0
Turns off (low) fourth line halftone output.
Used for the line 10 setting when LINS
1
Turns on (high) fourth line halftone output.
is high.
2
LIN2
0
Turns off (low) third line halftone output.
Used for the line 9 setting when LINS is
1
Turns on (high) third line halftone output.
high.
1
LIN1
0
Turns off (low) second line halftone output.
Used for the line 8 setting when LINS is
1
Turns on (high) second line halftone output.
high.
0
LIN0
0
Turns off (low) first line halftone output.
Used for the line 7 setting when LINS is
1
Turns on (high) first line halftone output.
high.
Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0.
No. 4846-12/20
LC74761, 74761M
BCOL1
BCOL0
Background color
0
Background color displayed
0
1
No background color (about 13 IRE)
1
0
No background color (about 23 IRE)
1
CVoutmt2 (CSYNC)
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