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參數資料
| 型號： | LC74776M |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO30 |
| 封裝： | MFP30S |
| 文件頁數： | 23/35頁 |
| 文件大小： | 253K |
| 代理商： | LC74776M |
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Pin Functions
No. 6018-3/35
LC74776, 74776M
Pin no.
Pin
Function
Notes
1
VSS1
Ground
Ground connection (digital system ground)
2
XtalIN
These pins are used either to connect the crystal and capacitors used to form an external
crystal oscillator circuit to generate the internal synchronizing signals, or to input an external
XtalOUT
Crystal oscillator
clock signal (2fsc or 4fsc). As a mask option, the XtalOUT pin can be set to function as
3
(MUTE)
(MUTE input)
the MUTE input pin. When this pin is set low, the video output is held at the pedestal level.
(A pull-up resistor is built in and the input has hysteresis characteristics.)
Switches the mode between external clock input and crystal oscillator operation. A low level
4
CTRL1
selects crystal oscillator operation and a high level selects external clock input. As a mask
(CHABLK)
option, the CTRL1 input pin can be set to function as the CHABLK (character
. frame)
output. This is a 3-value output.
5
SCL
I2C clock input
Clock input for the PDC/VPS data output. I2C bus.
6
OSCIN
LC oscillator
Connection for the external coil and capacitor for the oscillator used to generate
connections
the character output dot clock
7
OSCOUT
Outputs the state of the external synchronizing signal presence/absence judgment. Outputs
External synchronizing
a high level when synchronizing signals are present.
8
SYNCJDC
signal judgment output
Outputs either the crystal oscillator clock if CS and RST are low, or the VCO clock if CS
and RST are high.
(This signal is not output after a command reset.)
Enable input for the OSD serial data input.
9
CS
Enable input
Serial data input is enabled when this pin is low.
A pull-up resistor is built in and the input has hysteresis characteristics.
10
SCLK
Clock input
Serial data input enable pin.
A pull-up resistor is built in and the input has hysteresis characteristics.
11
SIN
Data input
Serial data input.
A pull-up resistor is built in and the input has hysteresis characteristics.
12
VDD2
Power supply
Composite video signal level adjustment power supply (analog system power supply)
13
CPOUT
Charge pump output
Charge pump output. Connect a low-pass filter to this pin.
14
VCOIN
Oscillator control voltage input
VCO oscillator control voltage input. (For data slicing)
15
VSS3
Ground
Ground (VCO ground)
16
VCOR
Oscillator range adjustment
VCO oscillator range adjustment resistor connection
17
NC
This pin must either be connected to ground or left open
18
VDD3
Power supply (+5 V)
Power supply (+5 V: VCO power supply)
19
CVOUT
Video signal output
Composite video signal output
20
VSS2
Ground
Ground (analog system ground)
21
CVIN
Video signal input
Composite video signal input
22
CVCR
Video signal input
SECAM chrominance signal input
23
VDD1
Power supply (+5 V)
Power supply (+5 V: digital system power supply)
24
SYNIN
Sync separator circuit input
Video signal input to the internal sync separator circuit
25
SEPC
Slice level output
Slice level verification pin
26
SEPOUT
Composite synchronizing
Internal sync separator circuit composite synchronizing signal output. The signal actually
signal output
output can be switched by MOD0 and SEL0. The DAV signal is output in the initial state.
PDC/VPS data I/O.
27
SDA
I2C bus data I/O
The I2C bus write address is [0111 1100].
The I2C bus read address is [0111 1101].
28
CDLR
Background color phase
Background color phase adjustment resistor connection
adjustment
29
RST
Reset input
System reset input.
A pull-up resistor is built in and the input has hysteresis characteristics.
30
VDD1
Power supply (+5 V)
Power supply (+5 V: digital system power supply)
Note: *Both VDD1 pins must be connected to power.
Crystal oscillator input
switching
(CHABLK)
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