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參數資料
| 型號： | LC74784M |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁數： | 5/17頁 |
| 文件大?。?/td> | 187K |
| 代理商： | LC74784M |
~ COMMAND6 (Synchronization signal detection setup command)
First byte
Second byte
Note: The register states are all set to zero when the LC74784/M is reset with the RST pin.
COMMAND7 (Display control setup command)
First byte
No. 4991-13/15
LC74784, 74784M
Register content
DA0 to DA7
Register name
State
Function
Note
7
—
0
Second byte identification bit
6
RN2
0
1
5
RN1
0
1
4
RN0
0
1
3
SN3
0
1
2
SN2
0
1
SN1
0
1
0
SN0
0
1
External synchronization signal
detection control
Signal present to absent transition
recognition
Setting for the sampling period when
SYNC can not be detected
consecutively in the horizontal
synchronization signal period (1H).
External synchronization signal detection
control
Signal absent to present transition
recognition
Setting for the sampling period when
SYNC can be detected consecutively in
the horizontal synchronization signal
period (1H).
RN2
RN1
RN0
Number of times HSYNC detected
0
0 times
0
1
4 times
0
1
0
8 times
1
0
16 times
SN3 SN2 SN1 SN0
Number of times HSYNC detected
0
Not detected
0
1
32 times
0
1
0
64 times
0
1
0
128 times
1
0
256 times
Register content
DA0 to DA7
Register name
State
Function
Note
7
—
1
6
—
1
Command 7 identification code
5
—
1
Display control setup
4
—
1
3
EX1
0
MODE1 setting output
Switches the SEPOUT (pin 19) output
1
PORT DATA1 setting output
2
PD1
0
The output is set low.
1
The output is set high.
1
EX0
0
MODE0 setting output
Switches the BLANK (pin 5) output
1
PORT DATA0 setting output
0
PD0
0
The output is set low.
1
The output is set high.
Register content
DA0 to DA7
Register name
State
Function
Note
7
—
1
6
—
1
Command 6 identification code
5
—
1
Synchronization signal control settings
4
—
0
3
MOD1
0
Sync separator circuit signal
Switches the SEPOUT (pin 19) output
1
High level output during internal synchronization
0
Pin 5: Blank signal
2
MOD0
Pin 8: Character signal
Switches the BLANK (pin 5) and CHARA
1
Pin 5: Composite synchronization signal
(pin 8) outputs
Pin 8: External synchronization signal discrimination output signal
1
DISLIN
0
12 lines
Switches the number of display lines.
1
10 lines
0
MUT
0
Normal output
Switches CVOUT
1
CVIN is cut and CVOUT is fixed at the pedestal level.
相關PDF資料 |
PDF描述 |
|---|---|
| LC74784M | ON-SCREEN DISPLAY IC, PDSO24 |
| LC74784 | ON-SCREEN DISPLAY IC, PDIP24 |
| LC74785 | ON-SCREEN DISPLAY IC, PDIP24 |
| LC74785M | ON-SCREEN DISPLAY IC, PDSO24 |
| LC74786 | ON-SCREEN DISPLAY IC, PDIP24 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LC74785 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
| LC74785M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
| LC74786 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller |
| LC74786-9606-E | 制造商:ON Semiconductor 功能描述:ON-SCREEN DISPLAY CONTROL - Ammo Pack |
| LC74786JM | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller |
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