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參數(shù)資料
| 型號(hào)： | LC74789M |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO24 |
| 封裝： | 0.375 INCH, PLASTIC, MFP-24 |
| 文件頁數(shù)： | 5/23頁 |
| 文件大小： | 209K |
| 代理商： | LC74789M |
No. 5732-13/23
LC74789, 74789M, 74789JM
COMMAND4 (Display control setup command)
First byte
DA
Register
Contents
Notes
0 to 7
State
Function
7
—
1
6
—
1
Command 4 identification code
5
—
0
Display character data write setup
4
—
0
3
TSTMOD
0
Normal operating mode
This bit must be set to 0.
1
Test mode
2
RAMERS
0
1
Erase display RAM. (The RAM data is set to FF hexadecimal.)
1
OSCSTP
0
Do not stop the crystal and LC oscillators.
1
Stop the crystal and LC oscillators.
0
SYSRST
0
1
Reset all registers and turn display off.
Second byte
DA
Register
Contents
Notes
0 to 7
State
Function
7
—
0
Second byte identification bit
6
BLK2
0
Character display area
Specifies the size for complete fill in
1
Video display area
5
BLK1
0
1
Changes the blanking size
4
BLK0
0
1
3
BK1
0
Blinking period: About 0.5 s
Switches the blinking period
1
Blinking period: About 1.0 s
2
BK0
0
Blinking off
1
Blinking on
1
RV
0
Reverse video off
1
Reverse video on
0
DSPON
0
Character display off
1
Character display on
Note: All registers are set to 0 when the LC74789/M/JM is reset by the RST pin.
Blinking in reverse video mode switches the display between
normal character display and reverse video display.
Erasing RAM takes about 500 s. (This operation
must be executed in the DSPOFF state.)
Valid in external synchronization mode when
character display is off.
The registers are reset when the CS pin is low, and
the reset state is cleared when CS is set high.
BLK0
0
1
BLK1
0
Blanking off
Character size
1
Frame size
Complete fill in
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相關(guān)代理商/技術(shù)參數(shù) |
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| LC74789N | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:LC74789N |
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| LC74793 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:VPS / PDC Slicer IC |
| LC74793JM | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:VPS / PDC Slicer IC |
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