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參數資料
| 型號： | LC74794M |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDSO30 |
| 封裝： | MFP30S |
| 文件頁數： | 23/30頁 |
| 文件大小： | 320K |
| 代理商： | LC74794M |
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No. 5557-3/30
LC74794, 74794M
Continued from preceding page.
Pin no.
Pin
Function
Notes
Enable input for OSD serial data input
9
CS1
Enable input 1
Serial data input is enabled by a low-level input.
(A pull-up resistor is built in so the input has hysteresis characteristics.)
10
SCLK1
Clock input 1
Serial data clock input
(A pull-up resistor is built in so the input has hysteresis characteristics.)
11
SIN1
Data input 1
Serial data input (A pull-up resistor is built in so the input has hysteresis characteristics.)
12
VDD2
Power supply
Composite video signal level adjustment power supply (analog system power supply)
13
CPOUT
Charge pump output
The charge pump output. Connect a low-pass filter to this pin.
14
VCOIN
Oscillator control voltage input
VCO control voltage input
15
VSS3
Ground
Ground (VCO ground)
16
VDD3
Power supply (+5 V)
Power supply (+5 V: VCO power supply)
17
VCOR
Oscillator range adjustment
Connection for the VCO range adjustment resistor
18
DAV
Data present output
Outputs a low level when PDC/VPS data has been received.
19
CVOUT
Video signal output
Composite video signal output
20
VSS2
Ground
Ground (analog system ground)
21
CVIN
Video signal input
Composite video signal input
22
CVCR
Video signal input
SECAM chrominance signal input
23
VDD1
Power supply (+5 V)
Power supply (+5 V: digital system power supply)
24
SYNIN
Sync separator circuit input
Internal sync separator circuit video signal input
25
SEPC
Sync separator circuit adjustment
Internal sync separator circuit adjustment input
Composite synchronizing signal output for the built-in sync separator circuit. Can be
26
SEPOUT Composite synchronizing signal output
switched to function as an output for the signal (high or ST. pulse) due to MOD0 by setting
SEL0 high.
Inputs the vertical synchronizing signal created by integrating the SEPOUT pin output
27
SEPIN
Vertical synchronizing signal input
signal.
An integration circuit must be connected to the SEPOUT pin. This pin must be tied to VDD1
if unused.
28
CDLR
Background color phase adjustment
Background color phase adjustment resistor connection
29
RST
Reset input
System reset input
A pull-up resistor is built in so the input has hysteresis characteristics.
30
VDD1
Power supply (+5 V)
Power supply (+5 V: digital system power supply)
相關PDF資料 |
PDF描述 |
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| LC74794 | ON-SCREEN DISPLAY IC, PDIP30 |
| LC74795M | ON-SCREEN DISPLAY IC, PDSO30 |
| LC74795 | ON-SCREEN DISPLAY IC, PDIP30 |
| LC74799 | ON-SCREEN DISPLAY IC, PDIP30 |
| LC74799M | ON-SCREEN DISPLAY IC, PDSO30 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LC74795 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
| LC74795M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller LSI |
| LC74798 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller IC |
| LC74798M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller IC |
| LC74799 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller IC |
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