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參數資料
| 型號： | LC749880T |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP120 |
| 封裝： | 14 X 14 MM, TQFP-120 |
| 文件頁數： | 16/17頁 |
| 文件大小： | 112K |
| 代理商： | LC749880T |
LC749880T
No.A1186-8/17
Pin Functions
I/O format
Pin No.
Pin symbol
I/O
Format
Connected to
Remarks
1
CRIN
I
A
Analog IF
Analog CR input (ADC1)
2
VRT1
O
A
Top level reference voltage connection pin for ADC1
3
VRB1
O
A
Bottom level reference voltage connection pin for ADC1
4
AVSS33
P
Analog GND
5
CBIN
I
A
Analog IF
Analog CB input (or S-C) (ADC2)
6
AVSS33
P
Analog GND
7
SC
I
A
Analog IF
Analog S-C input (ADC2)
8
AVDD33
P
Analog 3.3V
9
VRT2
O
A
Top level reference voltage connection pin for ADC2
10
VRB2
O
A
Bottom level reference voltage connection pin for ADC2
11
NBIAS
O
A
Bias voltage connection pin for ADC
12
VREF1
O
A
Reference voltage connection pin for ADC
13
AVSS18
P
Analog GND
14
SVO
O
A
ADC3 input internal analog video signal output
15
AVDD18
P
Analog 1.8V
16
YIN
I
A
Analog IF
Analog Y input (or S-Y,CVBS) (ADC3)
17
AVSS33
P
Analog GND
18
SY
I
A
Analog IF
Analog S-Y input (or CVBS) (ADC3)
19
AVSS33
P
Analog GND
20
CVBS1
I
A
Analog IF
Analog CVBS1 input (ADC3)
21
AVSS33
P
Analog GND
22
CVBS2
I
A
Analog IF
Analog CVBS2 input (ADC3)
23
AVSS33
P
Analog GND
24
VRT3
O
A
Top level reference voltage connection pin for ADC3
25
VRB3
O
A
Bottom level reference voltage connection pin for ADC3
26
VRTC
I
A
AGC control voltage input
27
RVSS33
P
Analog GND
VREF generator circuit analog GND
28
RVDD33
P
Analog 3.3V
VREF generator circuit analog 3.3V
29
LPFO
O
A
AGC PWM output
30
LPFVDD
I
A
AGC PWM output buffer power supply
31
SCANEN
I
C
Test pin (Normally, Lo)
32
SCANMOD
I
C
Test pin (Normally, Lo)
33
I
2CSEL
I
C
I
2C slave addresses L=0×88, H=0×8A
34
RESET
I
B
System reset (Active Lo)
35
GRST
I/O
G
Gate reset signal (or test input)
36
FLM
I/O
G
Gate start signal (or test input)
37
OE
I/O
G
Gate OE signal (or test input)
38
CPV
I/O
G
Gate lock signal (or test input)
39
STRB
I/O
G
Source strobe signal (or test input)
40
SP
I/O
G
Source start signal (or test input)
41
DVDD33
P
Digital 3.3V
42
DVSS
P
Digital GND
43
DVDD18
P
Digital 1.8V
44
DEXR
I/O
G
Source picture element reversal signal (or test input)
45
POL
I/O
G
Source line reversal signal (or test input)
46
TIM0
O
E
Data enable signal output/FLM2 (register selection)
47
TIM1
O
E
Vertical synchronizing signal output/SP2 (register selection)
48
TIM2
O
E
Horizontal synchronizing signal output
49
VP00
O
E
Video signal output R0/R_ODD_0 (MODE pin select=0)
50
VP01
O
E
Video signal output R1/R_ODD_1 (MODE pin select=0)
51
VP02
O
E
Video signal output R2/R_ODD_2 (MODE pin select=0)
Continued on next page.
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相關代理商/技術參數 |
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