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參數(shù)資料
| 型號： | LC7871NE |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數(shù)： | 19/19頁 |
| 文件大?。?/td> | 299K |
| 代理商： | LC7871NE |
Pin Functions
No. 4861-9/19
LC7871E, 7871NE
Pin No.
Pin
I/O
Function
1
S
I
CD DSP selection: High level input: LC7861N/67, middle level input: LC7860K/63, low level input: LC7868/69
2
SBCK
O
P to W subcode read clock
3
SFSY
I
Subcode frame synchronization signal
4
PW
I
P to W subcode data
5
SBSY
I
Subcode block synchronization signal
6
VDD1
—
Digital system power supply
7
CE
I
Control during serial input or serial output
8
DO
O
Serial data output
9
DI
I
Serial data input
10
CL
I
Serial data I/O clock
11
MUTE
I
Control signal used to specify that the subcode data be handled as invalid
12
VSS1
—
Digital system ground
13
CH0
I
14
CH1
I
15
CH2
I
16
CH3
I
17
CH4
I
18
CH5
I
19
CH6
I
20
CH7
I
Channel selection pins. A high level enables the corresponding channel.
21
CH8
I
These pins have built-in pull-down resistors.
22
CH9
I
23
CH10
I
24
CH11
I
25
CH12
I
26
CH13
I
27
CH14
I
28
CH15
I
29
1WE
O
Primary DRAM control
30
RAS
O
Control pin shared by primary and secondary DRAM
31
1A0
O
32
1A1
O
33
1A2
O
34
1A3
O
Primary DRAM address
35
1A4
O
36
1A5
O
37
1A6
O
38
1A7
O
39
1DB0
I/O
Primary DRAM data
40
CAS
O
Control pin shared by primary and secondary DRAM
41
1DB1
I/O
Primary DRAM data
42
OE
O
Control pin shared by primary and secondary DRAM
43
1DB2
I/O
Primary DRAM data
44
1DB3
I/O
45
2WE
O
Secondary DRAM control
46
2A0
O
47
2A1
O
48
2A2
O
49
2A3
O
Secondary DRAM address
50
2A4
O
51
2A5
O
52
2A6
O
53
2A7
O
Continued on next page.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC7872E | 制造商:Panasonic Industrial Company 功能描述:IC |
| LC7874E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:CD Graphics Decorder |
| LC7876E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC7880 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:16 bit D/A CONVERTER |
| LC7880M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:16 bit D/A CONVERTER |
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