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參數資料
型號: LC83025E
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝: QFP-80
文件頁數: 14/15頁
文件大小: 282K
代理商: LC83025E
Electrical Characteristics 1
at Ta = –30 to +70°C, all VDD = 4.75 to 5.25 V, all VSS = 0 V unless otherwise specified
No. 4977-8/15
LC83025E
Parameter
Symbol
Conditions
min
typ
max
Unit
Note
IIL1
RES, VIN = VSS (Input pins with built-in pull-up resistor)
–250
–100
A
8
Input low level current
IIL2
P0 to P2, VIN = VSS
–10
A
IIL3
Other input-only pins
–10
A
IIH1
SELC, SAIF, SAOF, VIN = VDD
100
250
A
8
Input high level current
(Input pins with built-in pull-down resistor)
IIH2
P0 to P2, VIN = VDD (n-channel transistor: off)
10
A
IIH3
Other input-only pins
10
A
Output high level voltage
VOH1IOH = –0.4 mA
4.0
4.98
V
1, 8
VOH2IOH = –50 A
VDD – 1.2
4.997
V
2, 3, 8
Output low level voltage
VOL1IOL = 2 mA
0.065
0.4
V
1, 8
VOL2IOL = 10 mA
0.32
1.5
V
2, 3, 8
Output off leakage current
IOFF
VO = VSS, VDD
–40
+40
A
I/O capacitance
CIO
10
pF
[Audio Data Output Timing]
Output data hold time
tOH
BCKO and ASO: shown in Figure 7.
–30
ns
7
Output data delay time
tOD
50
ns
7
[External DRAM Access Timing]
RAS high pulse width
tRP
80
ns
7
RAS low pulse width
tRAS
700
ns
7
CAS high pulse width
tCP
50
ns
7
CAS low pulse width
tCAS
95
ns
7
CAS cycle time
tPC
175
ns
7
RAS to CAS delay time
tRCD
60
ns
7
CAS hold time
tCSH
170
ns
7
RAS hold time
tRSH
Timing for output to the external DRAM.
95
ns
7
RAS address setup time
tASR
Shown in Figure 8.
60
ns
7
RAS address hold time
tRAH
20
ns
7
CAS address setup time
tASC
30
ns
7
CAS address hold time
tCAH
90
ns
7
DWRT pulse width
tWP
95
ns
7
Write command setup time
tWCS
12
ns
7
Write command hold time
tWCH
65
ns
7
Output data setup time
tDSO
30
ns
7
Output data hold time
tDHO
100
ns
7
Crystal oscillator
C1
OSC1 and OSC2: shown in Figure 2.
13
pF
8
C2
29
pF
8
Current drain
L
VDD1, VDD2, VDD3; oscillator frequency: 33.8688 MHz
1.5
H
8
IDD
60
95
mA
9
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