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參數資料
| 型號： | LC89517K |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數： | 4/6頁 |
| 文件大小： | 180K |
| 代理商： | LC89517K |
Pin Functions
Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, NC: Unconnected pin
No. 4854-4/6
LC89517K
Pin No.
Pin
Type
Function
1
RA9
O
2
RA10
O
3
RA11
O
4
RA12
O
Data buffer RAM address signal outputs
5
RA13
O
6
RA14
O
7
RA15
O
8VSS
P
9
IO0
B
Data buffer RAM data signals
10
IO1
B
These pins have built-in pull-up resistors.
11
IO2
B
12
IO3
B
13
IO4
B
14
IO5
B
15
IO6
B
Data buffer RAM data signals
16
IO7
B
These pins have built-in pull-up resistors.
17
VDD
P
18
VSS
P
19
HD0
B
20
HD1
B
Host data signals
21
HD2
B
These pins have built-in pull-up resistors.
22
HD3
B
23
VSS
P
24
HD4
B
25
HD5
B
Host data signals
26
HD6
B
These pins have built-in pull-up resistors
27
HD7
B
28
VSS
P
29
HDE
O
Host erasure flag output (Connect to VDD if unused.)
30
VSS
P
31
VSS
P
32
NC
33
NC
34
NC
35
NC
36
ERA
B
Data buffer RAM erasure flag signal (Connect to VSS if unused.)
37
ENABLE
I
Chip select signal input (from host computer)
38
CMD
I
Host command/data selection signal
39
RAMSL
I
DRAM/SRAM switch
40
VSS
P
41
VDD
P
42
HWR
I
Host data write signal input
43
HRD
I
Host data read signal input
44
WAIT
O
Wait signal output (to host). This pin can be switched to function as the DRQ signal.
45
DTEN
O
Data enable signal output
46
STEN
O
Status enable signal output
47
EOP
O
End of process signal output. Used during DMA transfers.
48
NC
49
NC
50
SELDRQ
I
Selects the mode for data transfers to the host.
Continued on next page.
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