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參數資料
| 型號： | LC895196 |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| 封裝： | SQFP-144 |
| 文件頁數： | 7/12頁 |
| 文件大小： | 282K |
| 代理商： | LC895196 |
Pin Functions
The LC895196 can be set to the opposite of the ATAPI pin layout using the setting of pin 29.
Pin 29 ATPINSEL = 0
No. 5737-4/12
LC895196
Pin No.
Symbol
Type
Function
1VSS0
P
2
ZRAS0
O
RAS signal output pin 0 to the buffer DRAM (Normally uses 0).
3
ZRAS1
O
RAS signal output pin 1 to the buffer DRAM
4
ZCAS0
O
CAS signal output pin 0 to the buffer DRAM (Normally uses 0).
5
ZCAS1
O
CAS signal output pin 1 to the buffer DRAM
6
ZOE
O
Buffer DRAM output enable
7
ZUWE
O
Buffer DRAM upper write enable
8
ZLWE
O
Buffer DRAM lower write enable
9VSS0
P
10
RA0
O
11
RA1
O
12
RA2
O
13
RA3
O
Address signal output pins to the data buffer DRAM
14
RA4
O
15
RA5
O
16
RA6
O
17
RA7
O
18
VDD
P
19
VSS0
P
20
RA8
O
Address signal output pins to the data buffer DRAM
21
RA9
O
22
IO0
B
23
IO1
B
24
IO2
B
Data I/O pin to the data buffer DRAM.
25
IO3
B
Built-in pull-up resistor.
26
IO4
B
27
IO5
B
28
IO6
B
29
ATPINSEL
I
ATAPI pin assignment select pin. Connect to VSS0.
30
IO7
B
31
IO8
B
32
IO9
B
Data I/O pin to the data buffer DRAM.
33
IO10
B
Built-in pull-up resistor.
34
IO11
B
35
IO12
B
36
VSS0
P
37
VDD
P
38
IO13
B
Data I/O pin to the data buffer DRAM.
39
IO14
B
40
IO15
B
Built-in pull-up resistor.
41
NC
42
VSS0
P
43
VSS0
P
44
VSS0
P
45
NC
46
NC
Continued on next page.
I: Input pin B: Bi-directional pin NC: Not connected O: Output pin P: Power supply pin
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