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參數資料
| 型號： | LC89970 |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP22 |
| 封裝： | 0.375 INCH, SDIP-22 |
| 文件頁數： | 7/9頁 |
| 文件大小： | 138K |
| 代理商： | LC89970 |
Block Diagram
Control Pin Function
Switching Voltage Levels
Note: Since the control pin has a built-in pull-down resistor, the pin will be set to the low state if left open.
FSC OUT Pin Function
This pin provides a buffer output for the clock signal input to the CLK pin.
Note: Since this pin has a built-in pull-up resistor, the pin voltage will go to the supply voltage and output will cease if left open.
No. 5111-7/9
LC89970, 89970M
CONT
Mode (representative example)
Chrominance signal delay
Luminance signal delay
(CCD bits)
Low
PAL/GBI
2 H (1705) + 0 H (2.5)
1 H (849.5)
High
4.43 NTSC
1 H (847) + 0 H (2.5)
1 H (843.5)
Low/high
Symbol
min
typ
max
Unit
Low
VL
–0.3
0.0
0.5
V
High
VH
2.0
5.0
6.0
V
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LC89970M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PAL CCD Delay Line |
| LC89971 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Multi-system CCD Delay Line |
| LC89971M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Multi-system CCD Delay Line |
| LC89972 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PAL CCD Delay Line |
| LC89972M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PAL CCD Delay Line |
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