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參數資料
型號: LM3352MTCX-3.0
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩壓器
英文描述: Reed Relay; Contacts:SPDT; Contact Carry Current:0.2A; Coil Voltage DC Max:5V; Relay Terminals:SMT J-Lead; Switching Current Max:0.1A; Switching Voltage Max:30V; Contact Carrying Power:3W; Leaded Process Compatible:Yes RoHS Compliant: Yes
中文描述: SWITCHED CAPACITOR REGULATOR, 1350 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 1.10 MM HEIGHT, TSSOP-16
文件頁數: 7/11頁
文件大小: 516K
代理商: LM3352MTCX-3.0
Typical Performance Characteristics
Unless otherwise specified T
A
= 25C. (Continued)
Applications Information
Operating Principle
The LM3352 is designed to provide a step-up/step-down
voltage regulation in battery powered systems. It combines
switched capacitor circuitry, reference, comparator, and
shutdown logic in a single 16-pin TSSOP package. The
LM3352 can provide a regulated voltage between 1.8V and
4V from an input voltage between 2.5V and 5.5V. It can sup-
ply a load current up to 200 mA.
As shown in Figure 1 the LM3352 employs two feedback
loops to provide regulation in the most efficient manner pos-
sible. The first loop is from V
through the comparator
COMP, the AND gate G
, the phase generator, and the
switch array. The comparator’s output is high when V
is
less than the reference V
. Regulation is provided by gat-
ing the clock to the switch array. In this manner, charge is
transferred to the output only when needed. The second
loop controls the gain configuration of the switch array. This
loop consists of the comparator, the digital control block, the
phase generator, and the switch array. The digital control
block computes the most efficient gain from a set of seven
gains based on inputs from the A/D and the comparator. The
gain signal is sent to the phase generator which then sends
the appropriate timing and configuration signals to the switch
array. This dual loop provides regulation over a wide range of
loads efficiently.
Since efficiency is automatically optimized, the curves for
V
vs. V
and Efficiency vs. V
in the Typical Perfor-
mance Characteristics section exhibit small variations. The
reason is that as input voltage or output load changes, the
digital control loops are making decisions on how to optimize
efficiency. As the switch array is reconfigured, small varia-
tions in output voltage and efficiency result. In all cases
where these small variations are observed, the part is oper-
ating correctly; minimizing output voltage changes and opti-
mizing efficiency.
Charge Pump Capacitor Selection
A0.33 μF ceramic capacitor is suggested for C1, C2 and C3.
To ensure proper operation over temperature variations, an
X7R dielectric material is recommended.
V
OUT
Ripple vs. C
OUT
DS101037-31
V
OUT
Ripple vs. C
OUT
DS101037-32
DS101037-3
FIGURE 1. Block Diagram
www.national.com
7
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