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參數(shù)資料
| 型號(hào)： | LM4548VH |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | AC ’97 Rev 2 Codec with Sample Rate Conversion and National 3D Sound |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, TQFP-48 |
| 文件頁(yè)數(shù)： | 14/18頁(yè) |
| 文件大?。?/td> | 322K |
| 代理商： | LM4548VH |
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Application Information
(Continued)
Bit
Description
Codec Ready
Bit
Slot 1 data
valid
Slot 2 data
valid
Slot 3 data
valid
Slot 4 data
valid
Comment
15
0=Not Ready, 1=Ready
14
Status Address is valid
13
Status Data is valid
12
Left Audio PCM Data is
valid
Right Audio PCM Data is
valid
11
SDATA_IN Slot 1: Status Address / Slot Request Bits
This slot echoes the control register which a read was re-
quested on. The address echoed was initiated by a read re-
quest in the previous SDATA_OUT frame, slot 1. Bits 11 and
10 are slot request bits that support Sample Rate Conver-
sion (SRC) functionality. If bit 11 is set to 0, then the control-
ler should respond with a valid PCM left sample in slot 3 of
the next frame. If bit 10 is set to 0, then the controller should
respond with a valid PCM right sample in slot 4 of the next
frame. If bits 11 or 10 are set to 1, the controller should not
send data in the next frame. Bits 9 through 2 are unused.
Bits 1 and 0 are reserved and should be set to 0.
Bits
19
Description
Reserved
Comment
Stuffed with
″
0
″
Echo of Control Register
for which data is being
returned.
0 = Controller should
send valid slot 3 data in
the next frame, 1 =
Controller should not
send slot 3 data in the
next frame
0 = Controller should
send valid slot 4 data in
the next frame, 1 =
Controller should not
send slot 4 data in the
next frame
18:12
Control
Register Index
11
Slot 3
Request bit
(PCM left)
10
Slot 4
Request bit
(PCM right)
Bits
Description
Other Slot
Request bits
Reserved
Comment
9:2
Unused
1,0
Stuff with
″
0
″
SDATA_IN Slot 2: Status Data
The slot returns the control register data. The data returned
was initiated by a read request in the previous SDATA_OUT
frame, slot 1.
Bits
Description
Control
Register Read
Data
Reserved
Comment
19:4
3:0
Stuffed with
″
0
″
’s
SDATA_IN Slot 3: PCM Record Left Channel
This slot contains the left ADC sample data. The signal to be
digitized is selected via register 1Ah and subsequently
routed through the Input Mux for recording by the left ADC.
This is a 20-bit slot, where the digitized 18-bit PCM data is
output from the codec MSB first and the last remaining 2 bits
will zeros.
Bits
Description
PCM Record
Left Channel
data
Reserved
Comment
19:2
18 bit audio sample from
left ADC
1:0
Stuffed with
″
0
″
’s
SDATA_IN Slot 4: PCM Record Right Channel
This slot contains the rightADC sample data. The signal digi-
tized is selected via register 1Ah and subsequently routed
through the Input Mux for recording by the right ADC. This is
a 20-bit slot, where the digitized 18-bit PCM data is output
from the codec MSB first and the last remaining 2 bits will ze-
ros.
Bits
Description
PCM Record
Right Channel
data
Reserved
Comment
19:2
18 bit audio sample from
right ADC
1:0
Stuffed with
″
0
″
’s
SDATA_IN Slots 5-12: Reserved
These SDATA_IN slots are set to
″
0
″
as they are reserved for
future use.
AC Link Low Power Mode
DS100987-7
FIGURE 7. Start of Audio Input Frame
DS100987-9
FIGURE 8. AC Link Powerdown Timing
www.national.com
14
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4549 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC ’97 Rev 2.1 Codec with Sample Rate Conversion and National 3D Sound |
| LM4549A | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC ’97 Rev 2.1 Codec with Sample Rate Conversion and National 3D Sound |
| LM4549AVH | 制造商:Rochester Electronics LLC 功能描述:AC97 REV2.1 CODEC - Bulk 制造商:OC White Company 功能描述:Audio Codec 2ADC / 2DAC 18-Bit 48-Pin LQFP Tray |
| LM4549AVH WAF | 制造商:Texas Instruments 功能描述: |
| LM4549AVH/NOPB | 制造商:Texas Instruments 功能描述:Audio Codec 2ADC / 2DAC 18-Bit 48-Pin LQFP Tray |
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