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參數資料
型號: LM92CIMX/NOPB
廠商: National Semiconductor
文件頁數: 16/25頁
文件大小: 1472K
描述: IC SENSOR TEMP/THERM COMP 8-SOIC
標準包裝: 2,500
系列: PowerWise®
功能: 溫度監控系統(傳感器)
傳感器類型: 內部
感應溫度: -55°C ~ 150°C
精確度: ±1.5°C(最小值)
拓撲: ADC,比較器,寄存器庫
輸出類型: 2 線串行,I²C?
輸出警報:
輸出風扇:
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -55°C ~ 150°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOP
包裝: 帶卷 (TR)
其它名稱: *LM92CIMX
*LM92CIMX/NOPB
LM92CIMX
LM92CIMX-ND
LM92CIMX/NOPBTR
LM 92
SNIS110D MARCH 2000REVISED MARCH 2013
www.ti.com
APPLICATION HINTS
The temperature response graph in Figure 16 depicts a typical application designed to meet ACPI requirements.
In this type of application, the temperature scale is given an arbitrary value of "granularity", or the window within
which temperature notification events should occur. The LM92 can be programmed to the window size chosen by
the designer, and will issue interrupts to the processor whenever the window limits have been crossed. The
internal flags permit quick determination of whether the temperature is rising or falling.
The T_CRIT limit would typically use its separate output to activate hardware shutdown circuitry separate from
the processor. This is done because it is expected that if temperature has gotten this high that the processor may
not be responding. The separate circuitry can then shut down the system, usually by shutting down the power
supply.
Note that the INT and T_CRIT_A outputs are separate, but can be wire-ORed together. Alternatively the
T_CRIT_A can be diode ORed to the INT line in such a way that a T_CRIT_A event activates the INT line, but an
INT event does not activate the T_CRIT_A line. This may be useful in the event that it is desirable to notify both
the processor and separate T_CRIT_A shutdown circuitry of a critical temperature alarm at the same time
(maybe the processor is still working and can coordinate a graceful shutdown with the separate shutdown
circuit).
To implement ACPI compatible sensing it is necessary to sense whenever the temperature goes outside the
window, issue an interrupt, service the interrupt, and reprogram the window according to the desired granularity
of the temperature scale. The reprogrammed window will now have the current temperature inside it, ready to
issue an interrupt whenever the temperature deviates from the current window.
To understand this graph, assume that at the left hand side the system is at some nominal temperature. For the
1st event temperature rises above the upper window limit, T
HIGH
, causing INT to go active. The system responds
to the interrupt by querying the LM92's status bits and determines that T
HIGH
was exceeded, indicating that
temperature is rising. The system then programs the temperature limits to a value higher by an amount equal to
the desired granularity. Note that in Event Interrupt Mode, reprogramming the limits has caused a second,
known, interrupt to be issued since temperature has been returned within the window. In Comparator Interrupt
Mode, the LM92 simply stops issuing interrupts.
The 2nd event is another identical rise in temperature. The 3rd event is typical of a drop in temperature. This is
one of the conditions that demonstrates the power of the LM92, as the user receives notification that a lower limit
is exceeded in such a way that temperature is dropping.
The Critical Alarm Event activates the separate T_CRIT_A output. Typically, this would feed circuitry separate
from the processor on the assumption that if the system reached this temperature, the processor might not be
responding.
16
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Copyright ?20002013, Texas Instruments Incorporated
Product Folder Links: LM92
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