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參數(shù)資料
型號: LMC7101BIM5
廠商: MICREL INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Low-Power Operational Amplifier
中文描述: OP-AMP, 9000 uV OFFSET-MAX, 0.5 MHz BAND WIDTH, PDSO5
封裝: SOT-23, 5 PIN
文件頁數(shù): 15/18頁
文件大小: 853K
代理商: LMC7101BIM5
4.0 Capacitive Load Tolerance
(Continued)
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4 This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
5.0 Compensating for Input
Capacitance when Using Large
Value Feedback Resistors
When using very large value feedback resistors, (usually
>
500 k
) the large feed back resistance can react with the
input capacitance due to transducers, photodiodes, and cir-
cuit board parasitics to reduce phase margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 5), C
f
is first estimated by:
or
R
1
C
IN
R
2
C
f
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for C
may be different. The values of C
should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
DS011991-11
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
DS011991-12
FIGURE 5. Cancelling the Effect of Input Capacitance
www.national.com
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LMC7101BIM5 制造商:Texas Instruments 功能描述:OP AMP CMOS LOW POWER SMD 7101
LMC7101BIM5/NOPB 功能描述:運(yùn)算放大器 - 運(yùn)放 Tiny Low Pwr RRIO Op Amp RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
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